Other Parts Discussed in Thread: ADS54J40
I am using ads54j40；Fs=1000MHz LMFS=8224 SYSREF=1000/512=1.953125 K=16
XILINX K7 325 for FPGA；
DA0->MGTXRXP0_115,DA1->MGTXRXP1_115,DA2->MGTXRXP2_115,DA3->MGTXRXP3_115,
DB0->MGTXRXP0_116,DB1->MGTXRXP1_116,DB2->MGTXRXP2_116,DB3->MGTXRXP3_116,
using 8 lanes; GTX : rx_data [255:0]
so my data analysis
adc0_sample0<={rx_tdata[7:0], rx_tdata[15:10] };
adc0_sample1<={rx_tdata[23:16], rx_tdata[31:26] };
adc0_sample2<={rx_tdata[39:32], rx_tdata[47:42] };
adc0_sample3<={rx_tdata[55:48], rx_tdata[63:58] };
adc0_sample4<={rx_tdata[71:64], rx_tdata[79:74] };
adc0_sample5<={rx_tdata[87:80], rx_tdata[95:90] };
adc0_sample6<={rx_tdata[103:96], rx_tdata[111:106]};
adc0_sample7<={rx_tdata[119:112],rx_tdata[127:122]};
adc1_sample0<={rx_tdata[135:128], rx_tdata[143:138]};
adc1_sample1<={rx_tdata[151:144], rx_tdata[159:154]};
adc1_sample2<={rx_tdata[167:160], rx_tdata[175:170]};
adc1_sample3<={rx_tdata[183:176], rx_tdata[191:186]};
adc1_sample4<={rx_tdata[199:192], rx_tdata[207:202]};
adc1_sample5<={rx_tdata[215:208], rx_tdata[223:218]};
adc1_sample6<={rx_tdata[231:224], rx_tdata[239:234]};
adc1_sample7<={rx_tdata[247:240], rx_tdata[255:250]};
but Data sheet ：Table 11. Default Frame Assembly：A0 A1 A2 A3
why is Table 11 LMFS=8224？
how to data analysis？
