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ADC12DJ3200: synchronization w/ DAC38RF89

Part Number: ADC12DJ3200
Other Parts Discussed in Thread: DAC38RF89, LMK04832

hi,

we are closing the design w/ ADC12DJ3200 (clock frequency is 2.45GHz) and 4x DAC38RF89 (clock frequency is 350MHz, converted to 2.45GHz internally).

Since we want to synchronize all four DAC transmissions (and ADC receptions respectively), should we match trace lengths for:

  • Clock and SYSREF nets lengths between LMK04832 and all converters?
  • JESD lane lengths between converters?

For the moment we plan to:

  • equalize SYSREFs and clocks between converters of the same type.
  • Leave JESD signals unequal between converters, though keeping the difference under 320ps.

Regarding SYSREFs and CLKs we can change phases from LMK but we would like to use this feature only if needed. 

Will this be ok for the synchronization or do we need to take into consideration anything else/more?

thanks a lot in advance

KR

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