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ADS4242: using single LVDS lane ?

Nir Flysher
Expert 3287 points
Part Number: ADS4242
Other Parts Discussed in Thread: ADS54J42, ADS6242

Dear Team,

My customer is considering using our ADS4242 for Dual, 14bit, 60Msps sampling.

As they have a very small FPGA they would like to use only single LVDS lane for each ADC core to transfer the data to the FPGA.

Is it possible to configure the ADS4242 for single LVDS lane operation ?

Alternatively, could you please advise an alternative device (Dual, 14Bit, 60Msps) that can drive each ADC samples data on a single LVDS lane ?

Regards,

Nir

  • 0
    TI__Guru* 91947 points

    Nir,

    I think you may be confusing this part with a JESD part. This part either has 14 outputs per channel in CMOS mode or 7 differential pair outputs per channel in LVDS mode.

    With the ADS54J42, the user could use this in one lane mode (LMFS = 1241). 

    Regards,

    Jim

  • 0 in reply to jim s
    TI__Expert 3287 points

    Hi Jim,

    Customer can't work with JESD as they don't have high speed transceivers on their FPGA.

    They are looking for a device with Serial LVDS.

    We have been looking into the ADS6242 as well which looks much similar to what the customer is looking for.

    Do you know if we can use the ADS6242 with single LVDS lane (per ADC) to carry all the data to the FPGA  ? (I couln't find any mentioning of this on the datasheet).

    Regards,

    Nir.

  • 0 in reply to Nir Flysher
    TI__Guru* 91947 points

    Nir,

    This part can send data on one output pair for each ADC. See page 53 of the data sheet.

    Regards,

    Jim