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DAC3171EVM: Data converters forum

Part Number: DAC3171EVM
Other Parts Discussed in Thread: DAC3171, CDCE62005

Hi,

The schematics of the DAC3171EVM show (on the top left corner following the signals DAC_DACCLKC,DAC_DACCLK,DACCLKC,DACCLKC) a circuit like this:

(this image was adapted from  TI's application report "AC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML" )

But according to the data sheet the input clock  DACCLKP/N is supposed to be LVPECL(self biased). What am I missing? Is this the correct way to couple the clock signal?

Thank you.