This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLC2543: TLC2543

Part Number: TLC2543

In "Figure 9. Timing for 12-Clock Transfer Using CS With MSB First" of TLC2543 datasheet,  there are two terms "Access Cycle B" and " Sample Cycle B". What does the capital letter “B” mean?

Thank you

  • Hi Kai,

    Welcome to our e2e forum!  The TLC2543 provides conversion results from the previous sample while setting up for and acquiring the current sample.  So what Figure 9 is trying to show you is that the conversion results from sample "A" are being shifted out on the DATA OUT line, while sample "B" is getting setup through the DATA INPUT line.  First the mux is addressed (Access Cycle B) and then the device goes into sample mode (Sample Cycle B) while the conversion results from Sample A continue to shift out of the data buffer.

    You can see the start of the next cycle in that figure as well - notice that DATA OUT shows 'B11' and DATA INPUT shows 'C7'.  It's just a repeat +1 of the conversion cycle.

  • Hi Tom,
    Thank you very much!
    Your reply is exactly correct, i totally understand your explain.
     
    Regards,
    Kai