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DAC81408: DAC81408 Register update

Part Number: DAC81408

Hi,

Do I have to wait at least tDACWAIT = 2.4us to update each register offset listed in the register map?

Best Regards,

Nishie

  • Hi,

    Treat these registers as data registers. So the same rules apply.

    By the way are you using the DAC in differential configuration? This register is only applicable in differential mode of operation.

    Regards,

    AK

  • Hi AK,

    Thank you for your reply.

    What happens if I operate in single-end mode?

    Is there a register map for single-end mode?

    Best Regards,

    Nishie

  • Hi,

    These registers are meant to offset the DC imbalances in the differential pair.

    Imbalances between the two differential signals result in common-mode and amplitude errors. The device incorporates an offset register that enables the user to introduce a voltage offset to the DACy channel of the DACx-y differential pair to compensate for a DC offset error between the two channels. The offset compensation gives a ±0.2%FSR adjustment window. The differential DAC data register must be rewritten after an update to the offset register.

    It has no effect in single ended mode of operation, and there us no register map for single ended mode.

    Regards,

    AK

  • Hi,

    I think that the register associated with differential mode your mentioned is below registers.

    07h TOGGCONFIG0

    08h TOGGCONFIG1

    0Eh TRIGGER

    21h OFFSET0

    22h OFFSET1

    And I think that other registers can be used for single-end mode.

    Is this correct?

    Best Regards,

    Nishie

  • HI,

    Except registers 21h and 22h, all others are applicable for single ended mode of operation.

    Regards,

    AK

  • Hi,

    Thank you for your reply.

    I understand it.

    Nishie