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AFE4490: Questions about CLKOUT pin of AFE4490

Part Number: AFE4490

Hi, TI expert.

Questions about CLKOUT pin of AFE4490.

A customer has a question regarding the CLKOUT pin of AFE4490.

Currently, the CLKOUT pin is floating as shown in the reference circuit below.

At this time, the EMC test failed. (See image below)

Currently, the CLKOUT pin of the AFE4490 is forcibly set to GND, and as a result of the operation, the data seems to be normally uploaded, but it is judged that the connection to GND should not be performed when viewing the Datasheet.

[Questions]

1) Due to an EMC problem, if the CLK OUT pin of the AFE4490 is not in a floating state, 10R on the reference circuit is not used, and is processed immediately, is there any problem with the internal circuit diagram?

2) If GND is processed after 10R on the reference circuit, is there any problem with the internal circuit diagram?

3) If there is a problem with the GND connection, is there any other way?

4) Why is the reference circuit designed in a floating state? Is it due to noise prevention? I wonder why.

5) Is it possible to provide the internal circuit diagram of 4MHz CLK OUT? (Blue shaded part of the datasheet image below)

please check.

Thank you.

  • Hello,

    Can you please on the image? Is it possible to place a marker on the 4MHz in the image?

    Also if the clock is not being routed to the MCU, then 10 ohm can be removed. Does the EMC test fail without the 10ohm resistor?

  • Hi, Praveen

    Thanks for the answer.

    It fails in EMC test without 10 ohm resistance of CLKOUT pin.

    And, I didn't understand the part you requested with the image you mentioned.

    If it's an image file, are you asking me to attach it as a PDF?

    This is the content of inquiries on whether to receive the internal circuit diagram of CLKOUT 4MHz in Figure 59 in section 8.3.2 of the Datasheet. (Blue part)

    Please check again.

    We have an EMC TEST schedule on 12/22, so we would be grateful if you would like to answer the questions 1, 2, 3 and 4 above.

    Thank you.

    AFE4490_AFE Clocking.pdf

  • Hi Grady,

    I was referring to this spectrum analyzer test result image below.

    Can you point to the 4MHz frequency tone marker?

    Meanwhile I will also check with my team and get back to you.

  • Hi, Praveen

    We inquired with the customer regarding the question you asked

    When measuring EMC, it is said to be measured in 4MHz units such as 34MHz, 38MHz, and 42MHz.

    The EMC waveform above is called the 42MHz band.

    So, I asked if I could get the circuit diagram of CLKOUT 4MHz.

    Please answer the 5 questions above.

    Thank you.

  • Hello Grady,

    I have reached out to you via email. Please check your email for my response.

  • Hi, Praveen.

    The customer development manager inquired directly by e-mail.

    Please check the contents of the e-mail and reply.

    As a reminder, I leave the contents of the mail here.

    -------------------------------------------------------------------------------------------------------------------------------------------------

    [ E-Mail Contents]

    Hi, Praveen.

    I applied afe4490 to the circuit. As grady said, emc test failed.

    The emc test still fails at a sampling frequency of 4Mhz., Exactly 36Mhz.

    It is judged that the clock out pin and the spi pin of the AFE4490 are on and off at the same time,

    so I would like to ask if only the clock out pin can not come out.

    If possible, please reply to me at least the development code. The situation requires CLK OUT PIN termination.

    Please reply as soon as possible.

     

    [Questions]

    1) Due to an EMC problem, if the CLK OUT pin of the AFE4490 is not in a floating state, 10R on the reference circuit is not used, and is processed immediately, is there any problem with the internal circuit diagram?

    2) If GND is processed after 10R on the reference circuit, is there any problem with the internal circuit diagram?

    3) If there is a problem with the GND connection, is there any other way?

    4) Why is the reference circuit designed in a floating state? Is it due to noise prevention? I wonder why.

    5) Is it possible to provide the internal circuit diagram of 4MHz CLK OUT? (Blue shaded part of the datasheet image below)

    -------------------------------------------------------------------------------------------------------------------------------------------------

  • Hi Grady,

    I have reached out to you via email. Please check your email for my response.