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ADS1248: ADS1248 Channel multiplexing issue

Part Number: ADS1248
Other Parts Discussed in Thread: TMS320F280049,

Hi team,

I am using ADS1248 as a slave to my master TMS320F280049. I am using three wire RTD low side reference circuit for my project. I am attaching the circuit diagram and other details as an attachment with this thread. With this configuration I tested each of the two input channels of ADS1248 separately and the results are good. It is showing full scale reading for an open input and correct readings for the applied input. Then I tried to read both channels by switching back and forth between two inputs. At this point I am facing the following problems,

1. If both channels are open then my result is a full scale reading as expected.

2. if I connect a resistance to channel 1 (positive input connected to one end of the resistor and negative input and REFPO input are shorted at the other end of the resistor) then channel one reads correct value and channel 2 shows some random values instead of full scale reading being it open as of now.

3. If I connect the resistance to channel 2 then both channels is showing full scale reading irrespective of the resistance connected at the input.

Why this happens? I am not able read correct values from ADS1248 as of now. Please help me.

I know you people will not review code but I kindly request you to just visit my code (attached) and if you can find something odd in my code it will be helpful. 

I need to change IDAC1 values for changing channel selection along with MUX0 right? 

All I need is to switch between channels and able to store the results to two different variables. Please help me out, I tried everything at my disposal to solve this issue on my own before writing this thread.

ADS1248.zip

  • Hi Vineeth,

    Yes, you will need to switch the IDACs internally for the different RTD measurements: for V2 in the attached schematic, you will need to use AIN0 and AIN3, while for V1 you will need to use IEXC1 and IEXC2.

    I assume all of the measurements you are taking are using REFP0/REFN0 as the reference voltage. Please correct me if this is wrong.

    Also note that when you measure an open channel against an open reference, which is the case with no resistor in the path and no current flowing, the result is generally undetermined. But since the output code is ~VIN/VREF, any parasitic voltages in the circuit could quickly drive this relationship to full scale. This is likely what you are seeing for #1

    For #2: when you connect a resistor to Ch1 (I assume this is V1 in the schematic) and apply the IDACs to this resistor, you are also forcing current through R8, the reference resistor. So when you measure V1/VREF, you get an output code that is proportional to the input resistance. However, V2 is now seeing the same nonzero reference voltage but with a floating input. So the result is likely not full-scale anymore, but some random value.

    For #3: have you switched the IDACs also? If not then you basically have the same condition as in #1. It was not clear to me in this third case if the resistance is still connected at V1 or not. You also need to be sure to respect the IDAC compliance voltage, so choose the IDAC output current carefully, especially for a 3-wire RTD using 2x IDACs.

    -Bryan

  • Hi Bryan,

    Thank you for your quick response.

    Bryan Lizon86 said:
    I assume all of the measurements you are taking are using REFP0/REFN0 as the reference voltage. Please correct me if this is wrong.

    Yes I am using REFP0/REFN0 as my reference input.

    Bryan Lizon86 said:
    You also need to be sure to respect the IDAC compliance voltage, so choose the IDAC output current carefully, especially for a 3-wire RTD using 2x IDACs.

    Regarding this I have chosen IDAC current source value at 750 uA each. Two IDACs will now contribute a sum of 1.5 mA current to my reference resistor which is 1080 ohms generating a reference voltage of 1.62V.  So considering now connected resistance of 120 ohms at channel 1 (V2) it causes a drop of 0.09V across the resistor. Further if I calculate IDAC compliance voltage with AVDD 3.3V, the answer will be 1.71V(1.62+.09). I think this 1.71V is satisfacctory.

    Bryan Lizon86 said:
    when you connect a resistor to Ch1 (I assume this is V1 in the schematic)

    A small correction here I forgot to mention channel 1 is V2.

    Bryan Lizon86 said:
    For #3: have you switched the IDACs also?

    Yes I have verified it. I have written commands for it and both START and CS/ signals are respectively HIGH and LOW during the channel switching commands. Said that I have a doubt to change channel do we need to change anything rather than inputs and IDAC sources (MUX0 and IDAC1 registers) ?

    Probably the channel is not switching correctly or may be it is not switching as well. May be there is some problem with timing I guess. But I have verified the commands it is all fine. 

    I am resetting my FIFO quite often in the code. Will this cause any issue like false RXFFST readings something like that ?

  • Hi Vineeth,

    Have you tried reducing the gain to see if that changes anything? The gain you selected should work given the nominal values you have identified, but perhaps there is some unaccounted for voltage here that is causing the input to overrange.

    Also, have you measured the voltages seen across both RTDs and RREF with a multimeter to verify they are correct?

    -Bryan

  • Hi Bryan,

    I have given another 100 microseconds delay in between channel switching commands (after IDAC1 and SYS0 commands). Now it is working fine. As per datasheet VREFOUT capacitor requires 70 uS time for settling, I have only waited for 48 uS for complete command transfer. If I wait another 100 uS after the command transfer I think it will give VREFOUT capacitor sufficient time to settle. Now it is working perfectly. What will be your thoughts on this, is VREFOUT is really the problem here ?.

     

  • Hi Vineeth,

    If you have the device set to powerdown in between conversions, etc., then I could see the turn-on time of the reference being an issue, since the internal reference is used to power the IDACs.

    Either way it sounds like the additional delay has helped resolve this issue.

    -Bryan

  • Hi Bryan,

    Bryan Lizon86 said:
    If you have the device set to powerdown in between conversions, etc., then I could see the turn-on time of the reference being an issue, since the internal reference is used to power the IDACs

    Yes I think so. Anyways thank you for your amazing support means a lot.