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DAC3283 REAL INPUT DATA INTERFACE

Other Parts Discussed in Thread: DAC3283

Hi,

We have FMC150 board which has DAC3283 chip. I want to use the DAC with real (only I) input and output. Thus I have searched the datasheet of the DAC3283. I found that CONFIG19 register has bequalsa and aequalsb configuration.

- What is the function of this configuration bits? Does setting bequalsa or aequalsb change the data interface protocol? (http://www.ti.com/lit/ds/symlink/dac3283.pdf  - page 29)


I also found that CONFIG24 register has sleepa and sleepb configuration.

I will ask the same question here. Does setting sleepa or sleepb change the data interface protocol?


In the above configuration we need only one channel. Should I send the unused data to the DAC as in (http://www.ti.com/lit/ds/symlink/dac3283.pdf  - page 29) ?

Thanks,

Muhammet ÖZGÜR

  • Hi Muhammet,


    The data interface protocol never changes. If you plan to use the DAC as a single instead of a dual, then you can use the sleep bits to power down the 2nd channel and save power. The aequalsb bits is used to select which of the two outputs of the input demux is considered as channel I or Q data. In single mode of operation, you must still send the channel Q data. You can repeat the channel I data as channel Q in the format described on pg 29, figure 34 of datasheet.

    Thanks,
    Eben.