I have a design with multiple DAC38J84s with outputs that must be precisely synchronized. Each DAC38J84 is running at 2 GSPS internally. However, even on a *single* DAC38J84, it looks like there's a single-cycle (500ps) delay between the AB and CD paths.
Here's a scope trace, with a delightful cameo by yours truly:
DACA and DACC are captured on a fast scope in yellow and cyan. The chartreuse trace shows SYSREF heading into the DAC; an edge is obscured by the legend on the right-hand side of the screen.
Most of the DAC setup is deliberately bypassed here to emphasize the unexpected delay. We've configured a sinusoid via the NCO, and routed (via config34) all 4 DACs to use path A. The discontinuity indicated by the scope's vertical cursors is due to a SYSREF edge clearing the NCO counters (and is, again, deliberate.)
In this mode, we were expecting DACA and DACC to track each other perfectly. Instead, we're seeing a 500ps delay between DACA and DACC. (We've validated that A/B are consistent, and C/D are consistent, but the two groups have a single-cycle delay.) This delay seems to be consistent across the other DACs we've looked at.
Any suggestions? I don't see anything in the datasheet stating this is expected behaviour. Our SYSREF setup/hold times look fine, and we are resetting the PLL counters using it.
thanks,
Graeme