ADS1211: Validate an approved fab lot from marking code

Hi Pascal,

Welcome to the forum.  Sorry to hear you are having issues.  The LTC you have given appears to be valid for the ADS1211.  Can you share what kinds of issues you are seeing?  And how previous parts differ?

Best regards,

Bob B

Hello Bob,

Thanks for your quick reply. Since you have confirmed that we got good parts, I can certainly tell you more about what we are seeing as I would greatly appreciate your input.

We recently saw some linearity issues that we were not seeing before. ADS1211 datasheet specifies integral linearity of the chip but there is no specification about local deviation from the linearity (differential linearity). In terms of integral linearity (INL) I believe we are within the chip spec by design but certainly not with a lot of margin. We can suppose that adding some unknown deviation from the linearity (DNL) could potentially bring us out of the ADS1211 limits.

Based on the details I'm providing below, can you confirm if we are operating within the limits of ADS1211U?

Details on chip config -->

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- Fxin = 10MHz

- PGA Gain: set to 1 at all time, no VBIAS

- Turbo Mode Rate = 16

- Decimation Ratio = 0x1047 (4167)

- Data Format is Two's complement, unipolar (0 to 5V - 0x000000 to 0x7FFFFF)

- Therefore, we get following mode of operation: Fmod=312.5KHz, Fsamp=312.5KHz, Fdata-rate=75Hz, LSB=10V/2^24=0.596uV, close to 23 effective bits RMS resolution.

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Some info on the system conditions when the problem is observed:

- ADS1211U is doing voltage acquisition in a very slow system.

- For one particular mode of operation, our signal voltage range can be as only ~600uV over some successive 15min periods.

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Details on the problem observed -->

- During about 2min, ADS1211 is always sending the same conversion code for a very specific voltage range at channel input

- Below is a screenshot of the problematic signal recorded realtime in our system

- I replicated the issue in the lab, using a waveform generator for the same specific voltage range

- Below is a screenshot of the signal recorded in the lab

- When the problem occurs, the voltage measured at the ADC channel input is within the following 50uV range: from 990.910mV to 990.960mV.

- The voltage value displayed result of the internal offset calibration and the mathematical operation made by our software.

- I have validated in the lab the digital interface and timing with data ready flag output. The always some code is sent from the ADS1211 through the SPI interface during the 2min period for which we observed the issue. We can also notice that once in a while a different code better matching the actual signal slope is sent during the same period.

Best Regards,

-Pascal.

Hi Pascal,

Thanks for the information.  One thing that I should have explained is that even if the LTC code is valid, unless the device either comes direct from TI or through our distribution partners there is no guarantee that the devices are good working devices.  For example, devices designated for scrap (such as those failing final test) may have circumvented the process by unscrupulous means and sold the devices on the black or gray markets.  These devices could have a valid LTC, but we have no means of tracking the history.  Only devices sold through our normal TI sales and distribution processes can be traced for validity and can be submitted for failure analysis.  There are many valid brokers and I have on occasion purchased devices myself through this means so I don't want to discredit anyone.  However, there is always a risk involved in doing so.

That said, let's assume the ADS1211 devices in question are valid.  There is always the possibility there can be unexpected issues.  The ADS1211 is a very complicated device and it is not possible to verify every mode of operation of the part in final test.  This would include various combinations of turbo mode and decimation ratios.  Most of the tests relate to the operating conditions in the Specifications table at Turbo Mode of 1.  Typical Performance Curves are based on characterization data collected prior to the initial device release.  The ADS1211 was released about 20 years ago, so this is a rather old device designed using manufacturing technology that no longer exists.  Since the initial device release and due to the popularity of the device and it's functionality the manufacturing was ported to a different process.  There is always the possibility for a process shift that results in a new issue never seen before with the device.  Over the span of time we have seen this happen and have made corrective actions.

TI appreciates the loyalty of our customers using this part for so many years, but as this device is so complicated and an older design, it is suggested to move  designs, especially any new designs, to a more recent part.  Some customers have moved to the ADS1256 or the ADS1262.  Another possibility is the ADS124S08.  TI has a large portfolio of products so there are other options as well depending on specific requirements.

As to the issue you are seeing, have you tried other combinations of turbo mode or decimation to see if the issue goes away?  What is your source impedance and input filtering?  How long has this design been in use?

Best regards,

Bob B

Hello Bob,

Thanks for your valuable input. We are trying to locate where those parts have been bought. I agree that we should move to a more recent part on new design (it is part of our plan). However, short term we do still have to deal with ADS1211U because of schedule and firmware change limitations.

As to the issue we are seeing, yes I did have tried other combinations of turbo mode and decimation. Further down you can see the signal monitored in the lab when sampling frequency is dropped to 19.5KHz (TMR=1) and data output rate to 10Hz. There is clearly a significative improvement but we still see a linearity issue within a certain voltage range at the input.

This design been in use since the last about 12 years. I'm not the designer of this design. I would probably have designed the circuit using dynamic range adjustment with different PGA gain setting (avoiding a 600uV voltage range within a 10V full scale range would have not been a bad idea...). However, I have to say that design is apparently working well since a decade...

As to your question about input filtering, you can see below a screenshot of our circuit at the ADS1211 input. There is an RC filter at the input using 2.2K resistor + 0.1uF cap. Signal is coming from a typical high-voltage instrumentation amplifier like INA188 from TI. I believe that output impedance measured in open-loop for these type of op-amp is low (<1 ohm when freq<1KHz).

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Improvement on the signal when TMR=1 (Fsamp=19.5KHz) and Decimation=1952 (Fdata=10Hz):

Best Regards,

-Pascal.

Hi Pascal,

Could you send me your complete register settings being used?  Also, you might try shorting the input filter resistor to see if that makes any difference.

Thanks,

Bob B

Hi Bob,

I assume you’re interested by settings in the Command Register (CMR). If I read this register during normal operation of the device (once the calibration performed) I get 0x1A019047. This means the following binary values:

- Byte 3: BIAS=0, REFO=0, DF=0, U/B=1, BD=1, MSB=0, SDL=1, DRDY=0

- Byte 2: MD[2:0]=000, G[2:0]=000, CH[1:0]=01

- Byte 1: SF[2:0]=100, DR[12:8]=10000

- Byte 0: DR[7:0]=01000111

As previously mentioned, using 10MHz crystal we can translate these settings as following:

- PGA Gain: set to 1 at all time, no VBIAS

- Turbo Mode Rate = 16

- Decimation Ratio = 0x1047 (4167)

- Data Format is Two's complement, unipolar (0 to 5V - 0x000000 to 0x7FFFFF)

- Therefore, we get following mode of operation: Fmod=312.5KHz, Fsamp=312.5KHz, Fdata-rate=75Hz, LSB=10V/2^24=0.596uV, close to 23 effective bits RMS resolution.

I did try shorting input filter resistor (install 0 ohms on top of R54 2.2k resistor at CH1 input). You can see the results on the two screenshots below.

Bottom line, I didn’t catch the failure on CH1 without the LPF but CH1 is getting a lot noisier (noise level  > 50uV range of failure). I’m not totally sure how to decode the result and I didn’t spend too much time tweaking my setup. On the second screenshot you can see that the 50uV failure range at CH2 input has moved between 990.840-885mV rather than typically 990.910-60mV when having R54=2.2K.

 Best Regards and thanks for your help!

-Pascal.

Hi Pascal,

This looks like a dead zone issue which I know is possible with a 0V input. I have not seen a dead zone at this high of a voltage input value.  I was wondering if there was a relationship between available charge at the input sampling caps with the series resistance causing a restriction.  If the integrating op amp does not see a difference in charge relative to the input/reference sampling, it is possible for the modulator to lock to a specific value.  Unfortunately for this experiment the noise will be enough to make a difference so that the dead zone is not clearly seen when the input filter resistance is removed. 

I'm not sure what more I can add at this time as it does appear to be an issue with the device.

Best regards,

Bob B

Hello Bob,

Being an issue with the device is kinda statement I was expecting at this time given the information we have. On our side, we are still having a hard time to clearly determine the origin of those devices (lot#52AFP5T).

What would be also valuable input from you (if possible) regarding this issue is:

1- With regards of this dead zone issue, is it kind of defect that are typically detected part of TI ADS1211 screening process?

2- If applicable, what information/document you would need so you can confirm those devices are TI approved devices.

Best Regards,

-Pascal.