Please take a look at the image above. Yellow line is SCK, cyan line is SDO, returning 0x85 from DAC. If we look at 0x01, 0x02 and 0x04 bits, it shows good transition - on the back front of SCK. But first bit, left one, 0x08 is captured during earlier, during upfront of first SCK clock. And same behavior during every first byte, where 0x08 bit is "1". Second and third bytes always captured during back front. We don't see any reading issues now, but this might be in a harsh environment. Why this first bit is captured earlier? IS this ever an issue?
