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DAC39J82: JESD div

Layne Jakahi
Intellectual 820 points
Part Number: DAC39J82

Hi, guys,

We are trying to configure JESD related registers for DAC39J82.

At register config37 or hex 0x25, we do not know how to set "clkjesd_div" since there is no information about it.

We are using LMF=821.  DAC PLL is bypass mode, which means we feed in sampling clock directly from pins. No interpolation is used. 

What is the rule to set it? 

Thanks