In the AFE58JD18 datasheet, it says "Bypass all supply pins with 0.1-μF ceramic chip capacitors (size 0603 or smaller)." I read that as, for every supply pin, one should add a bypass capacitor. However, in the EVM design, this doesn't seem to be the case. For example, the 5VA rail has 7 pins on the device, but only 4 capacitors on the EVM Decoupling schematic.
Given the EVM is a reference design, is it OK follow this example?
On a similar note, I see there isn't a via for every power or ground pin of the device, but instead power and ground pins are grouped together with traces or polygon pours sharing a subset of vias. Again, I want to be sure it's ok to follow this example.
