ADS1248: How to do a single read after a holdoff delay

Short form: Does pulsing START restart a conversion, even if no intervening RDATA operation is done?

(NOTE: The following is similar to the sequence described in 10.1.9 of the data sheet "Power-Down Mode Example", but with the added requirement that we initiate a conversion 500 mSec after completing the WREG operations.)

Motivation: To keep power consumption to a minimum, my high-level goal is something like this:

1. Reset the ADS1248
2. Perform a SDATAC operation to put it in single-sample mode
3. Configure the chip with a pair of WREG operations (MUX0, VBIAS, MUX1, SYS0) and (IDAC0, IDAC1, GPIOCFG, GPIODIR, GPIODAT)
4. Wait for 500 mSec (setup time required by the analog front end)
5. Initiate a conversion
6. Wait for DRDY,n
7. Perform an RDATA  operation to fetch the sample

I'm uncertain how to make this work in single conversion mode.  This is because:

• Step 3 requires that START be high to enable the WREG operations
• Step 4 requires that START be set low (so the chip can enter sleep mode)
• Step 5 requires that START be set high to enable a conversion

But note that there was no RDATA operation between step 3 and step 5.  My hope is that that's okay, and that re-asserting START will simply discard any previous conversion (or conversion in progress).

As an aside, after doing steps 1-4 (to set up the chip and honor the holdoff time) , I will probably do steps 5-7 repeatedly (to multiple samples).

So my questions:

• Is this the right approach?
• If not, what's the correct way to accomplish this?