DLP3021-Q1: SPI Flash Writing Method in FPGA Architecture

Part Number: DLP3021-Q1

Tool/software:

Dear Team,

In our research on FPGA architecture, we have a question we'd like to ask.

We are exploring ways to accelerate the write speed of NOR Flash.

However, based on the circuit diagram in our FPGA architecture, we noticed that writing to Flash is done using Standard SPI, while reading is performed using Octal SPI.

Why not use Octal SPI for programming the Flash? By using a switch IC to toggle between Octal SPI being used for Flash-to-FPGA or PC-to-Flash communication, would it be possible to achieve a faster write speed when flashing the .img file?

Thank you for your assistance.

Best,

Johns

  • Hi Johns,
    Thank you for reaching out to us.
    Let me get back to you on the same.

    Regards,
    Siddharth

  • Hello Johns,
    Thank you for your patience.

    Yes, the flash (MT35XU02GCBA1G12-0AAT) used in DLP3021-Q1 has Octal Input/Output capability (so ideally, we can use Octal SPI protocol to both read and write the flash).

    However, I believe the limitation is coming from the USB-to-SPI adapter we use to write from PC, which can only work for the Standard SPI protocol.
    Also, the Cheetah USB-to-SPI adapter or the FTDI USB-to-SPI cable only work for the standard SPI protocol. 

    Due to this limitation, if you see the Reference design schematic:

    In Box 1, the MUX is used to reuse only the first 2 Flash data lines - Flash DQ0 and Flash DQ1 either for connecting it to the FPGA or to the MISO and MOSI data lines coming from the USB-to-SPI adapter.

    The FPGA (refer box 2) can use all the Flash DQ0 to DQ7 (all 8 data lines) because it has the sufficient I/O pins to do that.

    Since the USB-to-SPI adapter only supports Standard SPI with only 2 data lines, the MUX is designed that way.

    I believe, if an Octal SPI supporting USB -to-SPI adapter is used, and an appropriate 8:1 MUX is used we can achieve PC to Flash write operation faster.


    Regards,
    Siddharth

  • Hi Siddharth,

    Thank you for your confirmation. I have a follow-up question:

    Is the programming speed ultimately limited by the NOR Flash program time?

    The NOR Flash program speed is 256 Bytes / 0.18 ms ≒ 1.1 Mbps.

    Even with 16MHz Standard SPI, the system still has to wait for the NOR Flash programming at 1.1 Mbps, so using a faster OSPI wouldn’t make a difference, right?

    Could you confirm if my understanding is correct? (Theoretically, ignoring Erase and Verify time.)

    Best,

    Johns

  • Hello Johns,

    I have informed Siddharth that you have a follow-up question.  He should get back to you in the next couple of days.

    Fizix

  • Hi Fizix~ Thanks for your help!

  • Hi Johns,

    Is the programming speed ultimately limited by the NOR Flash program time?

    I wouldn't quite say that the NOR flash is the limiting factor because it would differ from one design to another.

    What Siddharth is saying above is that, in the EVM's case, the USB-to-SPI adapter is the bottleneck.

    In someone else's design, they may use a different SPI interface that will allow octal SPI.

    Are you able to screenshot where you found that the NOR flash program speed is 256 Bytes / 0.18 ms? I don't think I found that information in the datasheet.

    Regards,
    Michael Ly