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DLPC3433 DSI Timings, HS Clock for 4-lane design

Other Parts Discussed in Thread: DLPC3433

Hi, 

I'm following "DSI Setup and Debugging Guide v1.0.pdf" for setting up DSI routing on DLPC3433 chip.

1. Why PClk is 25.9054 MHz in Example DSI Configuration and Timings? I'm trying to use 720p (1280x720) with 4-lane design so how do I computer PClk? do we have set of ranges with respect to different resolutions being used?

2. Why DsiHsClockInput is 51.2MHz in "DLPC343x Setup" commands?

    # Write: DsiHsClockInput                                                                                                                                                                                                                                                                                                                     W 36 bd c8 00

Jagan.

  • Jagan,

    The PClk in the provided timings is based on an input resolution of 854x480. These timings will need to be adjusted to support 1280x720 resolution.

    As for the DSI HS Clock Input value, how are you getting 51.2 MHz out of the provided input of 0x00C8? Note that the command format is the I2C address, then command address, then the command.

    Regards,

    Philippe Dollo

  • Hi Philippe,

    Yes, I understand the PCLK computation in order to get 60Hz refresh rated based on DSI timings.

    But do we need to make existing porch, sync values as constant and update hactive and vactive  as 1280 and 720 for getting pclk for 60Hz refresh rate or any other method here? 

    Apart from it, where can I find the physical width and height for 854x480 or for 720p?

    Yes, you are correct about DSI HS clock and C8 mean 200 MHz. but, why it is 200MHz?

    Jagan.

  • Jagan,

    Not sure I understand the question fully. 

    "do we need to make existing porch, sync values as constant": You may want to review the DSI Host Timing requirements in the DLPC3433 datasheets. The goal would be to increase the resolution and fit the porch/sync sizes based on your system's capabilities while meeting the minimum requirements of the DLP Controller: https://www.ti.com/lit/ds/symlink/dlpc3433.pd 

    "where can I find the physical width and height for 854x480 or for 720p?": Do you mean image size? If you are referring to the display size this is customizable in the DLP controller via I2C commands in the DLPC3433 Programmer's Guide: https://www.ti.com/lit/ug/dlpu020d/dlpu020d.pdf 

    I believe the 200 MHz DSI clock is based on the 210 MHz clock recommendation in the DSI v1.0 guide you mentioned above.

    I hope this helps.


    Regards,

    Philippe Dollo

  • Hi Philippe Dollo,

    Thanks for the details.

    Okay, It would be better to have existing timings from the document to work first.

    I have a question regarding the DSI driver sequence.

    1. I wrote the panel driver and register the DSI Host

    2. During panel prepare or enable, I'm writing the I2C batch register as mentioned in "DLPC343x Setup" for 854x480

    3. Send the DSI signal as per the document.

    So, what do you mean by sending a DSI signal? is it by sending 0x29 MIPI DCS Display On command to Host or any specific Host command so-that Host can aware of?

    Can you please explain here what exactly the sequence will be?

    Jagan.

  • Hi Jagan,

    Our DSI Setup and Debugging Guide can be found at this E2E thread.

    The guide provides in depth explanations of the timings and sequences for a nominal DSI setup.

    Regards,

    Austin

  • Hi Austin,

    Yes, I do follow the same document however I'm have question of How DSI host can aware of DSI transaction once all configuration done in I2C. This is what is pointed in step 3 mentioned above "Send the DSI signal", I'm not clear about what it means.

    Is it some sort of DCS commands to send host or something?

    Jagan.

  • Hello Jagan,

    In a typical system, the Host processor will send these I2C command to controller over I2C bus to configure the controler. If another micro-controller (MC) is used for I2C command then  MC should communicate to host that DLP controller is has been configured for DSI. After that ,the host can initiate the data transfer over DSI which mean DSI signal which includes the DSI clock and data lane can be active.

    Please also note that the DSI signal (from host) which includes DSI clock and data lines should remain idle in LP11 mode until HOST_IRQ goes low which represents that controller is initialized.

    Hop this answers your question.

    regards,

    Vivek 

  • Hi Vivek.

    Sorry, I do understand what you are saying. However, I'm looking this sequence from the Linux driver point-of-view.

    I have Linux DSI slave driver(usually a panel driver), with enable sequence for communicating into DSI host.

    Here is the sequence of my driver operations.

    1.  PROJ_ON

    2.  Register DSI host

    3. Setup I2C configurations for 854x480 with below i2c write sequnce

        0xd7 = 0x0

        0x10 = 00 00 00 00 56 03 e0 01

        0x12 = 00 00 00 00 56 03 e0 01

        0x2e = 56 03 e0 01

        0xbd = c8 00

        0x05 = 0x00

        0x07 = 0x00

    4. Sending Display ON 0x29 DCS command to host so-that it would enable the DSI routing

    The point 4 make the DSI transaction in DSI host side by writing start transfer register to enable LP11 lines. This is typical step for any panel setup slaves. So what exactly does DLPC is expecting to send the host for make the DSI routing possible for the step 4. This is what exactly I'm looking for?

    Jagan.

       

  • Hello Jagan,

    After I2C commands in step three, the controller is ready to receive DSI data. The command to Host to initiate transfer is fine and will work.

    Please refer to section "7.3.2 Device Startup" in DLPC3433 datasheet. 

    www.ti.com/.../dlpc3433.pdf

    "The DLPC34xx controller is ready to receive commands through I2C or accept video over the DSI or the parallel interface only after auto-initialization is complete:

    How are checking the initialization is complete before sending those I2C command?

    regards,

    Vivek

  • Hi Vivek,

    I believe I2C command sequence will succeed only if auto sequence is proper.

    These are steps I have checked it. 

    1. PROJ_ON GPIO is set High

    2. All respective regulators are enabled

    3. HOST_IRQ is pull low

    Jagan.

  • Hello Jagan,

    HOST_IRQ low check will ensure that controller has completed the initiation. This should work.

    regards,

    Vivek