Texas Instruments (TI) Processors support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search processors content or ask technical support questions on Sitara™ processors, digital signal processors (DSP) and automotive processors. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Part Number: TDA4VH-Q1 Other Parts Discussed in Thread: TDA4VM , TDA4VL , TDA4VH
In TDA4VH, TDA4VM and TDA4VL, by default GPIO has bank architecture when it comes to interrupt. This below guide explains how to enable the line interrupt.
Part Number: AM625 Other Parts Discussed in Thread: AM62P , AM62L
Hello, I am using a low power mode on an AM62 Family device including AM62x, AM62P, AM62A, AM62D and AM62L. What are some steps to debugging why the low power modes is not working as…
Part Number: TDA4VH-Q1 Other Parts Discussed in Thread: TDA4VH
The MDIO pins and the data pins routed to PHY are from different instances of CPSW due to Hawdware constrain or referencing by mistakenly, How to address this issue and possibility for using…
Part Number: AM4372 Other Parts Discussed in Thread: TPS65218 , TPS65218D0 , TPS65910 , TPS65217 , TPS650250 , TPS6521825 , TPS6521815 , TMDXEVM438X-EPOS , TMDSEVM437X , AM5728 , AM4378
Hi TI Experts,
I am working on a design using AM437x or AM438x…
Part Number: TDA4VH-Q1
I have a camera, serializer, and deserializer, and I'm trying to capture video on CSI-RX.
What order do I need to enable the devices in? What issues may appear if the order is incorrect?
Part Number: TDA4VH-Q1
By default, CPSW does not pass VID 0 (priority-tagged) frames as-is. The Linux driver strips or replaces VID 0 at both ingress and egress, making it impossible for the use-cases that require VID 0 with priority bits set on the…