DP83TD510E: Link not establishing between two phys

Hello Ed, 

Thank you for the Query.

Do you have a schematics that i can have a look at ?

Regards,

Sreenivasa

DP83TD510E-DP83TD510E.pdf

Hi Sreenivasa,

thanks, for your response. Here's the schematic.

Hello Ed, 

Thanks for the schematic.  I am not able to visualize the media conversion function with this schematics.

If you have any concerns sending the schematics, please share a simple block diagram for me to understand the interface without any assumptions and provide the required feedback.

Regards,

Sreenivasa

5428.schematic.pdf

Here's the full schematic. The single pair is connected at J3 to an identical module.

Hello Ed, 

Thank you. I will review the schematics and provide my inputs by mid of next week.

Regards,

Sreenivasa

Hello Ed, 

As i review the schematics, i wanted to check if you have done the testing with an RC on the reset pins.

If you could please add an RC on the Reset for both the devices and ensure the device are in reset during power-up and supply ramp to ensure proper reset and strap configuration and check the performance.

Have you read the device register using MDIO  and verified ?

Regards,

Hi Sreenivasa,

I've added a 10nf cap to the reset line which should provide the appropriate ramp. I'm connected to the Phys using the MDIO interface using the USB-2-MDIO tool and a launchpad. I've found that with regards to the LED behavior, they were set to active low outputs, effectively inverting them. When I change this, LED1 comes on solidly when I connect the two boards over single pair.

I'm still not getting data through the link. Looking at the registers, I can see that for both Tx and Rx, the transmitted/received packet count equals the error count. So there's some kind of connection, but 100% of the data is in error. 

Finally, I can see bit 0 of the PHY_STS register is 1. Does this indicate the RMII link is operating?

thanks

Hello Ed,

Thankyou for the update, 

Can you please check the connection between the  RGMII transmit and the receive signals. Please note that the TX of the phy U3 must connect to the RX of the other PHY U2 and vice versa. 

Regards,

Sreenivasa 

Hi Sreenivasa,

yes that's how it's wired, you can see the cross over on page 1

Ed

Hello Ed, 

Thanks for updating. I see the same net names for TX on both devices and RX on both devices. I would assume you have verified this on the board. 

Regards,

Sreenivasa

The net names aren't global, so TXD0 on one page doesn't automatically connect to TXD0 on another, rather the TXD0 of DP83TD510E is connected to RXD0 of the DP83848 on page 1. On the board the resulting trace runs from U2.24 to U3.36, and so on with the rest of the bus.

Looking a little deeper at some of the registers, I've noticed that register 0x020E, AN_CTRL_10BT1, which should have a value of 0xA000 after reset is holding a value of 0x0000, and not accepting writes. This register controls what capability the PHY advertises, and a null value looks like it might cause it to not advertise anything. It holds the null value whether it's connected to a partner or not. Is this likely to be a problem? what might cause this behavior?

Ed 

Hello Ed, 

You might want to refer to the below section

7.6 MMD Register Address Map

Regards,

Sreenivasa

Hi Sreenivasa

While I appreciate there is a limit to the support you can provide, I'm not really sure what help you're expecting that comment to be. Is there something in that table that somehow relates to my questions?

Ed

Hello Ed, 

There may be some issues with the register access that is making the value read 0000 and the section of the datasheet provides the register access information.

Regards,

Sreenivasa

I'm using the MDIO-2_USB tool and having no problems reading and writing the other registers, for example, 0x0469 which controls the polarity of the LEDs. I do notice that register 0x020E is on a different MDD, should I be doing something different with the tool to read and write that register?

Ed

Hello Ed, 

Please try doing an extended register access.

https://www.ti.com/lit/ds/symlink/dp83tc811r-q1.pdf

Please refer to page 39 to 42.

Regards,

Sreenivasa