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DP83867IS: Unable to exchange data with PHY

Part Number: DP83867IS

Hi,

Customer has done experimentation DP83867IS as per Trouble shooting manual of TI -- snla246a. The details as below.

 We have DP83867IS(SGMII mode) IC. to Marvell 88e630 Switch in SGMII mode its port 9. We are able to establish the link , but unable to exchange the Data with PHY IC.

  • Ensured power supplies, RBIAS resistors,Magnetic Connections,Reset signal,Clock pins, We able to access resisters with PHY ID 0x09
  • SGMII Lines are AC coupled with 0.1uF capacitor
  • Worked on Far-end-Loopback mode and data is getting loop backed.
  • Below are the Register values read through SMI interface.

0x0 -- 0x1140
0x1 -- 0x7949
0x2 -- 0x2000
0x3 -- 0xA231
0x4 -- 0x0181
0x5 -- 0xcc01
0x6 -- 0x006F
0x7 -- 0x2001
0x8 -- 0x6001
0x9 -- 0x0300
0xa -- 0x0800
0xb -- 0x0000
0xc -- 0x0000
0xd -- 0x0000
0xe -- 0x0000
0x10-- 0x5848
0x11 --0xB002


At marvell switch(88e6390) side we have verified the following.

  • Using CRO we have verified that at power on switch is able to get data from PHY on SMI interface using PHY address '9'.
  • Also we have verified switch(Marvell 88e6390) counters and there is no error when we analyze counters, i.e., all Ingress and egress counters on this port and the other port are matching always.
  • PHY IC address is '9' and it is interfaced with 9th port of the Marvell Switch 88e86390.
  • P9_SMODE pin tied pull-up -- SGMII mode
  • Port status register0 -- bits 0:3 are configured as 0x0A for SGMII mode.

 

Regards,

Akshat

FAE

  • Hello Akshat,

    Was this register dump taken with link-partner connected on the copper cable side? I dont see that copper cable side linked up here : register<0x0001>[2] = 0. 

    When customer tested far-end loopback (reverse loopback), how did they check that data is getting looped back? Have they also tried any near end loopback to check if Sgmii connections are fine?

    Can they share the schematic?

    --

    Regards,

    Vikram

  • 1.Regarding the Register 0x0001 the link status the data was taken when link is not placed. When link is there it showing its presence.

    2.Regarding the Far-end Loopback

    • We have checked the far end loopback by configuring the following registers
    • 1. Write register 0x0016 to 0x0020 to enable reverse loopback.
      2. Write register 0x001F to 0x4000 to apply a software restart.
    • We sent the packets through the MDI interface(to PC) and confirmed that the frames were coming in Wireshark.

    3.Regarding the near end loopback:

    • We have checked the near-end loop back by configuring the following registers
    • 1. Write register 0x001F to 0x8000 to apply a software reset.
      2. Write register 0x0000 to 0x0140 to force 1000BASE-T operation.
      3. Write register 0x0016 to 0x0004 to enable digital loopback.
      4. Write register 0x001F to 0x4000 to apply a software restart.
    • But the MAC cannot receive the frames transmitted. As it is connected to switch, we could able to see the transmitted count but as it is not receiving, there is no increment in the receive count.

    Also I am attaching the Schematics with this mail(BOM of components are mentioned in schematic).

       Additional BOM information :

    • D49 and C38 at WDG-Reset are NC.
    • K61 is Short.
    • R310,R307,R306 are 2.2K.
    • pull-up of 1.5K is given to MDIO interface.

    Note: Schematics already shared to Mr Akshat

  • Hello,

    I am looking at the details shared here and over the email. I am targetting to get back to you on this by tomorrow.

    --

    Regards,

    Vikram