Hello,
Our customer used TLK3131 to communicate with FPGA, there is a problem is that after reset, HSTL always receive data( at this time the driver hasn't been send data). And the transmitter and receiver of the serdes don't short connect. Then he read all the registers after power up, and found that some registers are not the default value. I am not sure if it is the reason.
0x12 0x0000 0x4000
0x13 0x0000 0x8000
0x14 0x0000 0xC000
0X1C 0x0000 0x9000
0x1D 0xFFFD 0x0000
0x9013 0x0000 0x0004/0x0000
0x9014 0x0000 0x0004/0x0000
0x9200 0x0000 0x6300
0x9204 0x0000 0x1163
0x9205 0x0000 0xBB68
0x9206 0x0000 0x1102
0x9207 0x0000 0x100F
0x9208 0x0000 0x0100
the hardware pin configuration:
serdes_sloop = 0; serdes_ploop = 0;
serdes_speed0 = 1; serdes_speed1 = 1;
serdes_code = 0; serdes_prbsen = 0; serdes_prtad = 5'b00000;
In addition, attached is the schematic .
Best regards
Kailyn