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DS90UB954-Q1: lock status check

Part Number: DS90UB954-Q1

Hello,

I have two questions regarding the lock status when 954 is paired with 953/35:

1. what is the difference between 0x04[2]:lock and 0x4D[0]:lock-sts? i was told 0x4D[4] lock-sts-chg is asserted but lock pin is not pulled low (set falling edge trigger of the scope), i need to verify at customer side. At the same time, i want to understand the difference.

2. In 954 datasheet, lock status is described in RAW12 and RAW10 mode, how about in CSI mode when pair with 953/35?

Thanks

Dongbao

  • Hello Dongbao,

    1. There are two RX ports on the 954. Register 0x4D is a port specific register. You can select the port (to see it's lock status in 0x4D[0]) by setting register 0x4C[4] accordingly. Register 0x04 is not a port specific register. Since there is only one LOCK pin, but two Rx Ports, the LOCK pin can only show the status of one of them at a time. Or you can change the 0x0C register settings such that the LOCK pin shows the AND/OR logical operation of the LOCK status of Rx Port0/1. 

    2. For CSI-2 mode, you can use either the LOCK pin or the LOCK_STS register to know the lock status. 

    Best Regards,

    Shruti

  • Hi Shruti,

    Thanks for your confirm.

    1. If the lock selection is 1:1 mapped with port0 lock-sts, does it means lock=lock-sts?

    2. For csi-2 mode, is lock/lock-sts affect by the absence or missing of PCLK from sensor? My understanding is it shouldn't, it should rely on REFCLK of 953/35 (no mater it comes from back channel or local clkin), is that correct?

    Regards,

    Dongbao

  • Hello Dongbao,

    1. Yes, if you select port 1 in 0x0C, the LOCK pin will show port 1 status and if you select port 1 in 0x4C, the LOCK_STS will show port 1 status. 

    2. Yes, you are correct. For csi-2 mode, lock/lock-sts is not affect by the absence of PCLK.

    Best,

    Shruti