Other Parts Discussed in Thread: DP83869
We are using a DP83869 in MII loopback mode. Regardless of the CLK_O_SEL value written to IO_MUX_CFG Register (Address = 0x170), we see a 25Mhz clock on CLK_OUT. I have seen two different threads in this support forum where it is recommended to write to register 0x00C6. According to the datasheet for DP83869, this register does not exist. I do see it in DP83867 datasheet for PLL Clock-out Control Register (PLLCTL). Does register exist in DP83869 also?
