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Original question:

DS90UB954-Q1: Setting the CSI-2 TX rate to 1200Mbps per lane

DS90UB954-Q1: CSI TX lane rate selection and skew calibration

Abhishek Hegde
Prodigy 60 points
Part Number: DS90UB954-Q1
Other Parts Discussed in Thread: ALP

HI,

Since lane rate supported by the deserializer is 400Mbps, 800Mbps and 1.6Gbps. Do we choose a lane rate that is higher than the required one. Say if we need 1.24Gbps (for 3840x2160@60, RAW10, 4 lanes), we have to choose 1.6Gbps in deserializer ?

On a related note, datasheet says we need to enable CSI skew calibration for 1.6Gbps lane rate. In case we have chosen 800Mbps lane rate. Will it send skew calibration sequence if enabled ?

  • 0
    TI__Expert 6345 points

    Hi Abhishek,

    How are you getting 1.24Gbps (for 3840x2160@60fps, RAW10, 4 lanes)?

    In the deserializer you have 4 data lanes. If you are getting 1. 2Gbps from the imager, on the deserializer you can have 2 lanes each at 800Mbps.

    System examples:

    (click to enlarge)

    Yes, if you choose 800Mbps as your CSI-2 lane rate, skew calibration will be enabled. According to the MIPI D-PHY specs, you need to have the skew calibration enabled for speeds greater than 1.5Gbps; that's why it's instructed for 1.6 Gbps CSI speed to do so.

    Best Regards,

    Shruti

  • 0 in reply to Shruti More
    Prodigy 60 points

    Hi,

    I'm not using serializer input. I'm using pattern generation in deserializer itself.  So I should get upto 1.6Gbps CSI Tx. Isn't that right ?

  • 0 in reply to Abhishek Hegde
    TI__Expert 6345 points

    Hello,

    Yes, you can set the CSI-2 Tx operating speed using the CSI_PLL_CTL register.

    The main steps to follow before enabling patgen are given in section 7.5.11 Pattern Generation of the 954 datasheet. You can use the pattern generator tab in ALP (analog launch pad) to get the register settings for pattern generation.

    Best,

    Shruti