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DS90UB941AS-Q1: I.mx8 - 941AS - 928 to DLPC230 output issue with timing configuration problem

Zirui Su
Expert 5340 points
Part Number: DS90UB941AS-Q1
Other Parts Discussed in Thread: DS90CF386

Hi team,

I used to post a I.mx8→941AS→928→DLPC230 issue:

https://e2e.ti.com/support/interface-group/interface---internal/f/interface---internal-forum/1044845/ds90ub941as-q1-need-the-sample-initial-code-for-941as-in-single-mode-and-splitting-mode/3883169?tisearch=e2e-sitesearch&keymatch=%20user%3A461094#3883169

Please see my update on the debug process:

imx8-ti941 dsi.docx

The mipi dsi event file (please open it with mipi software on computer)

dsi_events_f6_b8_s8_v1_20220218.zip

Customer also tested the SoC-941AS-928-DPLC120, with the same configuration the output is normal. But with DPLC230, it could not work and the DLPC230 fae said its timing requirement is more stricter than DLPC120.

After cross-validation, we found that resolutions of 1152*576 and 864*480 can be lit on dlpc120, but not on dlpc230; this shows that dlpc230 has very strict timing requirements.

Did you see any successful experience with such combination with 1152*576@60hz resolution:

947+928+DLPC230;

941+928+DLPC230;

Could you please kindly provide us a proper timing for customer to set in SoC to let this resolution work properly?

We also analyzed the timing of 941 output, and found that the numbers of HAS, HFP and data in the last line are correct, but HBP has 35 more clocks (The number of Clocks that should be output theoretically is: 1152+8 + 50 + 40, the actual output is 1152+8+85+40)

Thank you!

  • 0
    TI__Mastermind 18046 points

    Hi Zirui, 

    I will review the other thread and look over the files you provided. 2/21 is an US Holiday and I hope to provide some comments by 2/25. 

    Best,

    Shu

  • 0 in reply to Shu Huang
    TI__Expert 5340 points

    Hi Shu,

    Thank you and I update some information from customer side:

    We also used a DS90CF386 converter board to test the output of 928 in RGB format, you could see the below video for a more clear view to check the issue, it seems that the last line of the transmission is not stable and flickering. Adjust timing will affect this but we do not know how to adjust the timing properly.

    Do you have mipi DSI stream source events for 1152*576@60hz for 941AS dumped from MIPI analyzer?

    When using DLPC120, 1152*576 and 864*480 could both output successfully and now when we use DLPC230 the 1152*576@60hz could not output (totally black screen);

    Last 2 lines of the picture transmission we see after LP(low power) then back to HS but other lines do not have the low power;

    Could you please kindly help to check how could we get a proper timing for customer to use with DLPC230 to successfully output the picture about 1152*576@60hz? Thank you!

  • 0 in reply to Zirui Su
    TI__Mastermind 18046 points

    Hi Zirui, 

    I looked over the data, it would be helpful you are able to probe CH0 on any of the DSI data lanes instead of the CLK for us to look at the LP mode sequences. 

    Looking over the DSI events, we noticed that there are inconsistent Horizontal line times, this may be a part of the issue. We recommend that the customer try to switch the 941 from pulse mode to event mode as the issues could be caused by the sync end signals. In order to do that, set 0x20[4] = 0 on the indirect DSI register page, and the sync widths are manually programmed via indirect DSI registers 0x30-0x33. That way, it may alleviate using HSE and VSE packets to define the SYNC signals. This may also resolve the HBP mismatch as well. 

    For the 35 extra clocks on the HBP, it is a result of longer time needed to complete the LP11 mode sequence. Switching the LP pulses to a vertical line should allow the customer to stay more consistent to their desired timing. The above method, switching to event mode can also address this. 

    Best,

    Shu