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Original question:

DP83867IS: TI evaluation board for SGMII signal testing?

DP83867IS: What is the register configuration for SGMII loopback?

Sree_Hari
Prodigy 20 points
Part Number: DP83867IS

Hello TI Forum!

What should be the register configuration for SGMII loopback checking?

My intention is to measure the SGMII signal voltage and other electrical characteristics of the SGMII signal from DP83867IS PHY.

Here is the register configuration I am planning to implement :

Reference: snla246a.pdf

Below is the test setup I am planning to execute with the evaluation boards I have:

RGMII evaluation board will be configured using an external MDC/MDIO host to generate the PRBS signals through the MDI interface and the SGMII signal will be looped back externally on the other end of the SGMII evaluation board.

SGMII signal electrical parameters will be measured from the SGMII evaluation board.

Could you please verify the register configuration?

Thank you!

  • 0
    TI__Mastermind 33225 points

    Hello,

    For this configuration, you do not need to configure reverse loopback on the SGMII operating PHY as the external cables will do that for you inherently. You can either have reverse loopback, or have the external loopback. Either way, the data should be going back to the link partner (RGMII board) all the same.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Prodigy 20 points

    Hello Gerome,

    Thank you for the response.

    Yes. As you rightly mentioned, the configuration will be done on the RGMII board, not on the SGMII board.

    I am concerned about the register values for the PRBS configuration. Just wanted to make sure that proper register values are selected for intended operation (Generation of PRBS at RGMII board and external SGMII loop-back in SGMII board)

    As per TI document, BIST Register (0x0016) should be configured to 0x0020. 

    If the value at BIST Register (0x0016) should be configured to 0x0020, it will only enable the reverse loop-back. 

    1. But this register value is not enabling the PRBS generator circuit, so this register value is not correct, right?

    2. Reverse loop-back mode will be sufficient for external loopback (set-up shown in the question) as well? 

  • 0 in reply to Sree_Hari
    TI__Mastermind 33225 points

    Hi,

    I am not necessarily understanding why you would like to implement any loopbacks on the RGMII board. The RGMII PHY should just have the PRBS generator and checker enabled, while SGMII PHY should operate as normal.

    So for RGMII PHY, the following should be implemented:

    - Reg 0x16[12] = '1'

    - Read 0x17, 0x72

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Prodigy 20 points

    Hi Gerome,

    My understanding was incorrect, sorry fort he confusion.

    I understand that I need to configure the RGMII for the PRBS generation.

    ( I was wondering if I need to do any configuration in SGMII board if I want to ensure the external loopback Reg 0x16[5:2])

    Thank you

  • +1 in reply to Sree_Hari
    TI__Mastermind 33225 points

    Hi,

    There is no need for additional configuration in SGMII board for your test. There is no need to configure for external loopback, as that term is referring to looping back on RJ-45 side (see figure 19). Please power up SGMII board as normal and connect cables as discussed in previous thread and that setup should be sufficient.

    Sincerely,

    Gerome