Part Number: DS90UB926Q-Q1
Hi Ti:
Sometimes the i2c slave device on 926 has the deadlock issue. So we want to use 926 to clear the bus, set the bit " the I2C Bus Timer" to 1 or 0?
BRs,
Arvin
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Part Number: DS90UB926Q-Q1
Hi Ti:
Sometimes the i2c slave device on 926 has the deadlock issue. So we want to use 926 to clear the bus, set the bit " the I2C Bus Timer" to 1 or 0?
BRs,
Arvin
Hi Arvin,
Do you mean that your UB926 device has the I2C bus accidentally held for too long, and you need the I2C Watchdog timer to release the I2C bus?
If so, yes, you can set register 0x06[1] = 1 in order to speed up the I2C Watchdog Timer. If this bit is set to 1, then the I2C bus will be released on the UB926 after about 50ms and new I2C commands can be sent. If this bit is set to 0, then the I2C bus will only be automatically released after about 1 second.
But I think a more important issue is why the I2C bus on the UB926 side is being held long enough for you to need the I2C Watchdog Timer to release the bus. In the connected serializer, did you enable I2C_PASS_THROUGH or I2C_PASS_THROUGH_ALL?
If I2C_PASS_THROUGH is enabled, then only I2C commands defined in the SlaveAlias/SlaveID registers in the SER will be sent to the connected DES I2C bus.
If I2C_PASS_THROUGH_ALL is enabled, then any I2C command sent on the I2C bus on the SER side will be sent to the I2C bus on the DES side. In this scenario, it is possible to accidentally send an I2C command to the remote DES device's I2C bus and occupy the I2C bus, until the Watchdog Timer automatically cancels the transaction and frees the I2C bus.
These registers are in the SER device. For example, in the UB925 device, you can set either mode in register 0x17[7].

Best,
Justin Phan
Hi Justin:
Thanks for kindly reply. Our design is "941 -> 948-> lcd mcu". It seems i understand wrong before. So do you mean the 948 will release the i2c bus whatever we set the timer bit or not? Is the difference between them only 1 s or 50 ms?
But we can't access the slave mcu again when issue happen. It seems the i2c bus don't be released. And it will not recover until we power off/on the lcd device(948+mcu). How to explain this?
Hi Justin:
Thanks for kindly reply. Our design is "941 -> 948-> lcd mcu". My question is how to set 0x06[0], o or 1?
We set this bit to 1, can't access the slave mcu again when issue happen. It seems the i2c bus don't be released. And it will not recover until we power off/on the lcd device(948+mcu). How to explain this?
Hi Chen,
1) It seems you are talking about a 941->948-> system now. But the original post was about a 926 device. Can you confirm what devices are used in the system?
Our FPD-Link devices use clock stretching. If an I2C command is sent from Master->SER->DES->Slave, then the remote DES will hold the SCL clock line LOW until an ACK signal is sent from the Slave to the Master. But if no ACK signal is ever sent back to the Master, then the SCL clock line will continue to be held LOW and no other I2C commands can be sent on the I2C bus.
The DES has a Watchdog Timer, which automatically releases the I2C bus by sending a NACK response to the Master, after a certain amount of time has passed, and then terminate the I2C transaction.
Here is an App Note with more information of I2C communication over our FPD-Link devices:
Setting register 0x06[0] = 1 in the UB926 device will disable the Watchdog Timer.
2) Can you post a scope screenshot of the SCL and SDA lines on the UB926?
3) Are there any other devices on the UB926 I2C bus that may be holding the line LOW?
Best,
Justin Phan
Hi Justin:
1) 2) It's 926, sorry for that..
OK, I'll keep the default reset value 0x06 [0] = 0 and test it for a few days.
3) Only the one slave device: mcu.
More question:
Could you share what the empirical value about the value 0x06[1] is? 1 or 0?
Brs,
Arvin
Hi Chen,
The default value of register 0x06[1] = 0, as defined in the datasheet.

Best,
Justin Phan