Hello：
At present, the EDP TX of the CPU of d0271 supports 5.4G, and the LCD of the main screen supports edp1 2, but actually only EDP HBr2 is needed. The single channel speed is 2.7g. Actually, only lan0, lan1 and aux are used in the design,
1 . Sn65dp141 is a four channel. How should the channels (lan2 and lan3) not used in the above design be handled (input and output of dp141)? Floating or grounding?
2 . Is the chip recommended to be placed close to the CPU or sink LCD?
