PCA9306: How PCA9306 internal switch work?

Gabriel Xu

Intellectual 2145 points

Part Number: PCA9306

Hi Team

I have some questions about PCA9306, my questions have listed below:

In datasheet Figure.6 (Shown in below) The datasheet indicated that there is a FET between VREF1 and VREF2. What's this FET major functionality?
We could also know that there is a switch between SDA1 and SDA2 and EN pin control this switch on/off statues. Could you share more details about how the FET between VERF1 and VREF2 to achieve on/off control?
In below waveform (GREEN one is EN pin, yellow one is SDA2 with 10Kohm pull up) VREF1=3.3V and VREF2=5V. Customer want to know why there is a small platform in GREEN waveform. After EN fully power up it slightly drop to 4.7V from 5V.

over 3 years ago

0 Clemens Ladisch over 3 years ago

Guru 317480 points

1. The purpose of this FET is to bias the gate of all internal transistors to V_GS above V_REF1, so that signal voltages up to V_REF1, but not above, are passed through.

2. All chanells have similar FETs, with all gates connected together. You could use SCL1/SCL2 for the reference voltages and VREF1/VREF2 as a data channel.

3. V_REF2 must not be connected directly to 5 V; the 200 kΩ resistor is necessary to limit the current and to drop the voltage at EN to a lower value.

See [FAQ] How do the LSF translators work? and the linked application note and videos.

0 Gabriel Xu over 3 years ago in reply to Clemens Ladisch

TI__Intellectual 2145 points

Hi Clemens

Thanks for your reply. We have already added the 200kohm resistor between VREF2&EN and 5V.

Do you have any comments about why the SDA2 will have a significant voltage drop (and platform) during power-up.

I notice that the EN voltage which being used to provide VGS and turn on the internal FET is ramp up after the SDA voltage.

0 Gabriel Xu over 3 years ago in reply to Gabriel Xu

TI__Intellectual 2145 points

Customer also want to know why the high level in SDA will be only 4.68V rather than 5V?

How to reduce the voltage drop in SDA?

0 Clemens Ladisch over 3 years ago in reply to Gabriel Xu

Guru 317480 points

This device is a passive switch. You can find out where the current flows by measuring the voltage drop over the switch (Sxx1/Sxx2) or over the resistors.

For a high signal, the transistor is open, and the voltage is determined by the pull-up resistor. For a low signal, the transistor is closed, and the output voltage is the input voltage plus the voltage drop over the switch.

0 Chris Ayoub over 3 years ago in reply to Clemens Ladisch

TI__Genius 15345 points

Thanks for the help on this one Clemens.

0 David Wang60 over 3 years ago in reply to Clemens Ladisch

Intellectual 980 points

Clemens:

I read this FAQ ((+) [FAQ] PCA9306: Voltage levels translation - Interface forum - Interface - TI E2E support forums ) about the VIH/VIL/VOH/VOL and that these Pass-Transistor voltage translators do not have traditionally voltage thresholds. If that is the case, then how would you compare the voltage thresholds of the master to the slave? Would the VOL be the priority and compared directly with any impacts from the translator?

I'm just trying to understand how to apply the voltage thresholds of the devices with this pass translator.

0 Chris Ayoub over 3 years ago in reply to David Wang60

TI__Genius 15345 points

Hi David,

This device has no thresholds. It passes whatever logic level low that is on one side to the other. The Logic level high will depend on what voltage your individual bus is pulled up to. What do you mean by compare voltage thresholds of master to slave. The PCA9306 doesn't need to compare these voltages, whichever device is driving low will propagate its VOL onto the other bus. So if they have different VOLs which ever device is actually driving the bus low will be the VOL that you see. You have to make sure that both devices VILs are compatible to their VOLs.

Best,

Chris

0 David Wang60 over 3 years ago in reply to Chris Ayoub

Intellectual 980 points

Thanks for the clarification. I was able to find some app notes that explain the passive switch architecture, and it is unlike a traditional digital buffer. One thread that I did find indicates that the RON of the switch impacts VOL? Where is that current coming from? Does the output side pullup also add to the VOL of the driver?

Would you be able to provide a numerical explain just to help clarify the impacts to the VOL of the driver?

0 Clemens Ladisch over 3 years ago in reply to David Wang60

Guru 317480 points

Yes, all pull-ups act in parallel.

When the signal is low (switch closed), the circuit behaves like this:

0 Chris Ayoub over 3 years ago in reply to Clemens Ladisch

TI__Genius 15345 points

David,

Does Clemens' explanation make sense or do you need more clarification.

Best,

Chris