Hello expert,
Customer would like to know the timing sequence spec for VDD and VDD33. May I know if below timing is pass or not for TUSB9261? Thanks a lot!
Best regards,
Ann Lien
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Hi Ann,
I would recommend that you take a look at this past E2E thread, it covers what you are asking, plus gives some advice for powering sequence and timing for each rail hitting specified levels.
If possible, if you could send these waveforms plus the GRSTz pin waveforms, I would appreciate it. The datasheet requires that the device be in reset for at least 2 ms to allow for the power rails to reach their high levels.
Thanks,
Ryan