DP83822I: DP83822IRHBR

Hi Liang,

For further debug, may I ask couple questions:

• May I ask which one is LED_0 and LED_1?
• Are you powering up the board at 25 degree then go to -20 degree?
• Or are you powering up the board at -20 degree directly?
• I see that from your schematic, Ribas is not exactly 4.87k ohms with 1% tolerance. This is critical for the temperature sensitivity
• Could you also check the register 0x0467?

--

Thank you,

Hillman Lin

Hi Lin,

Green one is LED_0, Yellow one is LED_1.

Power up the board at -20 degree directly.

If Ribas must be 4.87k? Ribas is set to meet eye diagram parameters now., what else parameter I should set for ethernet signal integrity?

I can't read register 0x0467, and register 0x0002 can be read as 2 - 0x2000. See the log bellow

U-Boot# mdio read 1 0x0467
1 is not a known ethernet
Reading from bus cpsw
PHY at address 1:
Error

U-Boot# mdio read 1 0x0002
1 is not a known ethernet
Reading from bus cpsw
PHY at address 1:
2 - 0x2000

Hi Lin,

I had tried changing Rbias back to 4.87k, it can't work. At -20 degree ethernet is still abnormal.

Hi Liang,

Regarding to the register 0x0467, did you use extended register to read this register? The detail on how to read this extended register is shown in the session 8.4.2 in the datasheet.

Is it possible to read the register from 0x0000 to 0x001E and 0x0019 for both 25 degree and -20 degree conditions? We would like to know the health condition when the PHY in normal room temperature and -20 degree Celsius.

--

Thank you,

Hillman Lin

Hi Lin,

 I can‘t understand the command for reading extended register in session 8.4.2.

 In my system, mdio for register is like this:

 -------------------------------------------------------------------------

mdio - MDIO utility commands

Usage:
mdio list - List MDIO buses
mdio read <phydev> [<devad>.]<reg> - read PHY's register at <devad>.<reg>
mdio write <phydev> [<devad>.]<reg> <data> - write PHY's register at <devad>.<reg>
<phydev> may be:
<busname> <addr>
<addr>
<eth name>
<addr> <devad>, and <reg> may be ranges, e.g. 1-5.4-0x1f.

-----------------------------------------------------------------------------

Hi Lin

 Register from 0x0000 to 0x001E for both 25 degree and -20 degree，please see the attached file

 Register 0x0010 and 0x0017 is different, and both of them can change automatically.

PHY Registers at +25℃ and -20℃.xlsx

Hi Liang,

From the register read from 0x0017, it seems like the PHY is configured from RMII mode to RGMII mode when the PHY is put into the temperature -20 degree. Are you able to check the voltage of RX_ER and RX_DV pins when you hard reset the PHY at -20 degree Celsius and compare it with the PHY in the normal condition during the latching process or after a hard reset.

From my observation, the strap pin might be effected by noise during -20 degree Celsius and makes the PHY strap in a RGMII mode instead of RMII mode.

--

Regards,

Hillman Lin

Hi Lin

The question is if I remove the failed chip and replace by a new one. It can be normal at -20 degree.

In another abnormal device, register 0x0010 =4015, 0x0017=0x15.  Bit 14=1 of register 0x0010, MDI Pairs swapped.  What will make this error ?

--------------------------------------------------------------------------------------------

MDI/MDIX Mode Status:
1 = MDI Pairs swapped (Receive on TD pair, Transmit on RD pair)
0 = MDI Pairs normal (Receive on RD pair, Transmit on TD pair)

---------------------------------------------------------------------------------------------

Hi Liang,

I double check on your schematic, I do see some of your register is not following datasheet requirement:

Are you able to change the resistor to see rather it help with the PHY at -20 degree Celsius? The strap level or voltage level will get effected by the temperature.

--

Regards,

Hillman Lin

Hi Lin,

I think you know the config of strap level,  see attached file.  

RX_DV(pin26) is set to mode 3

CRS_DV(pin27) is set to mode 2

Strap level config.xlsx

Hi Liang,

Sorry for the confusion. You are correct on the strap voltage level. Just want to conclude the finding we have so far.

• There is one abnormal chip where it goes from RMII mode to RGMII mode when temperature goes to -20 degree Celsius. 
• There is another one abnormal chip goes from MDIX to MDI when temperature goes to -20 degree Celsius

From what my understanding is the strap pin for RX_ER and RX_DV somehow change the strapping voltage level at -20 degree where it disable RMII and enable RGMII, disable the auto MDIX feature so that the PHY cannot detect the Ethernet port orientation and not able to communicate. That is why I am concern on the strap voltage level during -20 degree Celsius. Again sorry for the confusion. Are you able to measure the strap voltage level of this two pins when temperature is -20 degree and 25 degree.

Just want to confirm is the root cause is from these two strap pins.

--

Thank you,

Hillman Lin

Hi Lin,

I made the test of strap pin,  But there is no obvious deviation for -20 and +25 dgree. Please see the attached file

If there is any suggestion about this issue?

8666.PHY Strap at different temperature.xlsx

Hi Liang,

Could you also check the RX_ER strap voltage between -20 degree and 25 degree Celsius, this strap pin also effect the RMII/RGMII and Auto-MDIX mode.

Meanwhile, I will bring up this question to the team to discuss internally.

--

Thank you,

Hillman Lin

Hi Lin

I measured the RX_ER  as well. And there is no more helpful information. Please see the attachment.

1. Register 0x0010=4715 is not a problem, because when 0x0010=4715, 0x0017=0x65, the ethernet can work normally 

    Chip go from MDIX to MDI can be ignored.

2. The problem is register 0x0017=249.

    DUT100 is normal at +25 &-20 degree, and it the problem will arise at -40 degree.(register 0x0017=249)

3. Power up DUT105 at +25 degree then go to -20 degree,  ethernet can work normally.

    It can't work when power up the board at -20 degree directly, as well as -10 degree.

If we can write register 0x0017 by 0x65, when after the board is powered up?

0116.PHY Strap at different temperature.xlsx

Hi Liang,

In order to help with the further debug, I really want to know the register 0x467 and 0x468 at both -20 degree Celsius and 25 degree Celsius. This two registers tell us what exactly the PHY is strap into. 

If you are having trouble on how to access the extended register library, Following instruction would help:

000D 001F

000E 0467

000D 401F

000E 

--

Regards,

Hillman Lin

Hi Lin

Disconnect the trace RX_ER from host chip to PHY chip. leave the RX_ER pin unconnnected. The board can work normally ar -20 and -40, as well as -45 degree. And register 0x0017 is always 0x65.

Could you analyze what's the root casue?

Can I leave the RX_ER pin unconnnected in our design ?

Hi Liang, 

It seems like the RX_ER is strap into wrong mode when it is connected to the host chip. In order to check the strap state. Reading 0x467 and 0x468 will be helpful to tell what mode is the PHY in during the under voltage.

Could you read these two register for further debug?

--
Thank you,

Hillman Lin 

Hi Lin

I still can't understand how to read extended register.

What's the mean as below?

000D 001F

000E 0467

000D 401F

000E 

--

Hi Liang,

Since the register 0467 will be in the extended register library1F,

Therefore it would require to extra procedure to read the register 0467:

1. Write 001F to 000D

2. Write 0467 to 000E

3. Write 401F to 000D

3. read 000E

//

000D 001F

000E 0467 (address)

000D 401F

000E          (value)

--

Regards,

Hillman Lin

Hi Lin

1. +25 degree Celsius: 0x0017=0x65, 0x0467=0xf6f,  0x0468=0x0

2. -20 degree Celsius:  0x0017=249, 0x0467=0xe6f,  0x0468=0x0

BTW, any concerns, if I leave RX_ER unconneted ?

Hi Liang,

From the register 467, we can confirm that RX_ER are strapped incorrectly under low temperature. It seems like RX_ER pin are pulled low by the SoC that this pin is connected to in the lower temperature. Could you check SoC side rather it is there is pull down during the low temperature?

--

Regards,

Hillman Lin

Hi Liang,

From the register 467, we can confirm that RX_ER are strapped incorrectly under low temperature. It seems like RX_ER pin are pulled low by the SoC that this pin is connected to in the lower temperature. Could you check SoC side rather it is there is pull down during the low temperature?

--

Regards,

Hillman Lin

Hi Lin

Disconnect the trace between SoC and Phy chip,. In PHY chip side, RX_ER high level is 3.3V (Both high or low temperature). 

It 's about 1.0V when the trace is connected  (Both high or low temperature)

 Please see attachment

PHY Strap at different temperature_20230317.xlsx

Hi Liang,

For the next step, are you able to disconnect RX_ER pin from SoC and measure the voltage on the SoC pin to see is there a noise coming through the SoC to the RX_ER pin?

--

Thank you,

Hillman Lin

Hi Lin

Attached file include the SoC pin already. (Yellow trace)

Hi Liang,

I would like a plot on SoC without RX_ER pin connection. I do think SoC is the main issue that is pulling RX_ER pin low for DP83822 during under voltage. Could you take a look rather this is the root cause for the DP83822 strap into wrong mode?

--

Thank you,

Hillman Lin

Hi Lin

Certainly, the root cause is from the SoC. But could you analyze why ?

1. It will be the wrong mode when RX_ER=1.0V (connected) at low temperature

2. It will be the right mode when RX_ER=3.3V (unconnected) at low temperature

Hi Liang,

During the strapping process, the PHY will read the voltage level of RX_ER pin to know what mode it need to operate in. However, SoC is pulling the strap voltage to 1V so that RX_ER will read the wrong voltage level and tell the PHY to work in different operational mode. I won't able to tell how does the SoC pull the RX_ER pin low during low temperature.

There are two possible solution to solve this problem:

• Make sure SoC is providing 3.3V to RX_ER during the strapping process
• Configure the PHY to right mode using the register within the PHY after the power up process

--

Regards,

Hillman Lin

Hi Lin

SoC is pulling RX_ER strap voltage to 1V. It's always 1V both +25 and -20 Degree.  

But PHY chip go to a wrong mode only at -20 Degree. PHY strap is more sensitive at low temperature, am I right ?

It can't work if Configure register 0x0017=0x65 only, after power up process.

Could I need to configure register 0x0017 and 0x467 back to the right value? Or any more register I need to check and configure?

Hi Liang,

Yes you are correct, the strap pin for PHY are more sensitive in lower temperature.

I would like one more clarification on your setup. What kind of MAC interface are you trying to perform? If your PHY is acting as RMII master, could you measure the clock speed in RX_D3 and CLK_OUT pin?

If possible could you also make register 0x0009 bit[5] = 1?

--

Thank you,

Hillman Lin