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DS160PT801: Intra Pair Skew, and Inter-Pair Skew

Roger Karam
Prodigy 20 points
Part Number: DS160PT801

Hi Ti team

is this specified at Maximum insertion loss?.

Is there a specification for the maximum allowed  Intra-Pair skew in the channel for each pair, over

different insertion loss.  in my case it will be high speed cables.

Thanks

roger

  • 0
    TI__Mastermind 18891 points

    Hi Roger,

    Please refrain from discussing secure documentation on E2E public forums. I have removed comments regarding secure information.

    Specified intra-pair skew is the maximum tolerated at each datarate.

    Best,

    David

  • 0 in reply to David Waier
    Prodigy 20 points

    Thank you David, sorry -i did not realize this was an issue on this forum.

    i need to specify a cable assembly, where do i get the numbers from? i don't find them in the data sheet.  thanks

  • 0 in reply to Roger Karam
    TI__Mastermind 18891 points

    Hi Roger,

    Do you have a model available of your cable assembly? From my understanding, your concern is with intra-pair skew (not inter-pair skew), correct? We have an IBIS-AMI model available if you'd like to model your current cable assembly with the retimer.

    Best,

    David

  • 0 in reply to David Waier
    Prodigy 20 points

    hi David

    no i am hoping to start with a specification to give to Rosenberger.  It would be good to know what is the maximum skew the phy can tolerate intra pair. so as to get a head start.  I am asking them for data.  Now i have two technologies one is PCIE Gen 4 and one is 100GE. 100GE is very common out there.

    you can see in the spec of the 100GE for instance what the number is 10ps/m ( let us assume this is close to what i will get ) 

    AmphenolFCI-ca_qsfp_copper-datasheet.pdf (mouser.com)

    so can the part do 10ps /m or better?

    thanks

    roger

  • 0 in reply to Roger Karam
    Prodigy 20 points

    h iDavid

    would an S-parameter set help you do the simulation? i can ask the vendor's permission to allow me to share the 5 meter s-parameter (4 ports)

    trouble is one measurment is not statistically significant.  I woner if we can crate a lab experiment where we introduce skew at fine steps to measure tolerance .  trouble is with psec kinda numbers, breathing on the board, and the temp in lab and.... affects it all.

    thanks

  • 0 in reply to Roger Karam
    TI__Mastermind 18891 points

    Hi Roger,

    Per Intel specification at PCIe Gen4, 5 mils of intra-pair skew is tolerated. I might suggest looking at MCIO cables for PCIe Gen5.

    Best,

    David