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Original question:

DS90UB948-Q1EVM: Artifacts on LVDS output

DS90UB948-Q1EVM: HDMI Display Issue

Bruce Deng
Prodigy 90 points
Part Number: DS90UB948-Q1EVM
Other Parts Discussed in Thread: ALP

Hi,

Following up on the last post, and continuing with the same hardware. I'm using the UB949 serializer with the UB948 to create an image. By changing the PATGEN display settings, I was able to achieve a good a image on the display with the pattern generator through the UB949-Q1EVM connected to the UB948-Q1EVM. /cfs-file/__key/communityserver-discussions-components-files/138/949_5F00_reg.zip

However, when I connect HDMI to the board, the display glitches and no longer displays a proper image. Where and what settings should I be trying to adjust to fix this image?

  • 0
    TI__Mastermind 33715 points

    Hi Bruce,

    Thank you for providing the information on your issue. We have a recommended sequence for the HDMI bring up on the Ux949 in Section 9.1 of the datasheet. Is this currently followed?

    Init A and Init B are detailed in the start of Section 9.1. These sequences ensure a stable frequency lock.

    In your 949 register dump, I could only view up to register 0x1A. A good register to check is DUAL_STS (0x5A) because it will report if valid data is recovered and if the clock is stable.

    Best,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    Hi Jack,

    Tried following the power on sequence - using the EVM board, so we powered on the boards, then flipped the PDB switch, and then delayed before plugging in HDMI. Still encountering the same issue. Register 0x5A is reporting 0xCD.

       

    Still encountering the same issues where the screen isn't properly displaying the correct image. 

  • 0 in reply to Bruce Deng
    TI__Mastermind 33715 points

    Hi Bruce,

    Has the EDID on the 949 been configured to tell the HDMI source the correct timing?

    Best,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    Sorry, I'm not sure - we are using all default switch positions and settings on the EVM. 

  • 0 in reply to Bruce Deng
    TI__Mastermind 33715 points

    Hi Bruce,

    What is the resolution of the display connected to the 948? The EDID is required to be programmed on the 949 so it can tell the HDMI source what resolution to output. Tools such as AW EDID editor can be used to generate an EDID for the display connected to the 948.

    Section 7.3.4 details the different ways to load EDID onto the 949. For your case, I would recommend using AW EDID editor to generate the EDID bytes and program the EDID using the APB registers.

    Here is a thread that goes over EDID programming: https://e2e.ti.com/support/interface-group/interface/f/interface-forum/988952/ds90ub949-q1evm-ds90ub949-evm

    Best,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    The display is the AUO G173HW01 V0, with the following characteristics:

    • Htotal = 2100
    • HActive = 1920
    • Hblank = 180
    • Vtotal = 1130
    • VActive = 1080
    • Vblank = 50
    • Frame Rate = 60

    Do I have to configure the EDID on both the 948 and 949? I've been adjusting the pixel parameters through registers to have the pattern generator display correctly, do those changes and these have any overlap?

    Thank you

  • 0 in reply to Bruce Deng
    TI__Mastermind 33715 points

    Hi Bruce,

    Thank you for providing the display datasheet.

    Bruce Deng said:
    Do I have to configure the EDID on both the 948 and 949?

    EDID only applies to the 949.

    Bruce Deng said:
    I've been adjusting the pixel parameters through registers to have the pattern generator display correctly, do those changes and these have any overlap?

    EDID SRAM is separate from the PATGEN registers.

    Because the display is using a basic 1920x1080 configuration, you can try setting the EDID to one of the default 1080p settings in ALP. EDID mode needs to be on Internal SRAM and the EDID SRAM data should be TI 1080p 2ch.

    Best,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    I'm trying to use ALP, but still having trouble with proper display. Should the HDMI status be 1280x720, and can I change that?

    Register 0x5A still has value 0xCD:

    Both 949 and 948 EVM boards have default switch settings based on the user manuals.

  • 0 in reply to Bruce Deng
    Prodigy 90 points

    By setting the config then plugging in HDMI, I'm able to achieve this image 

    It appears that the left side and center sections are inverted, and there is a section cut off on the far right side of the screen. I have seen the 2 black bars during pattern generation before, and have fixed those by changing the total/active screen size in PATGEN registers. Is this exclusively an EDID issue, or are there additional settings on either the 949 or 948 that need to be changed?

  • 0 in reply to Bruce Deng
    Prodigy 90 points

    Current HDMI page in ALP, register 0x5A remains the same.

  • 0 in reply to Bruce Deng
    TI__Mastermind 33715 points

    Hi Bruce,

    The HDMI Freq of 150 MHz looks correct. The HDMI source is sending the correct timing to the UB949.

    Bruce Deng said:
    or are there additional settings on either the 949 or 948 that need to be changed?

    There is a setting on the UB948 that needs to be set if not already. The AUO panel datasheet specifies a specific pixel color mapping over the dual OLDI inputs. Try setting MODE_SEL 0 to no #4. This will set MAP_SEL high and change the color mapping.

    Because I'm not sure how the 948 is connected to the display panel, if MODE_SEL 0 no #4 does not display a correct image try settings 0, 1, and 5 as well. The display looks like it has the correct timing but is not interpreting the pixels correctly.

    Best,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    Hi, 

    I tried changing MODE_SEL 0 on the 948 and none of the options were able to improve the image. This is how I am connecting the display:

    And here is the display's pinnout:

  • 0 in reply to Bruce Deng
    TI__Mastermind 33715 points

    Hi Bruce,

    Bruce Deng said:
    I tried changing MODE_SEL 0 on the 948 and none of the options were able to improve the image.

    Did any of the options change the picture on the display? Keep the MODE_SEL 0 on No. 4 since it is the correct setting for the display. On the EVM, this is 5th tab on the DIP switch since it indexes from 1.

    Best,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    Yes, some of the options did change the picture, but it either resulted in a worse image or nearly no image at all. 

    I'm having some success with the PATGEN by changing resolution settings exclusively. It appears that by using the default HD 1080p 60 Hz internal timing option results in very similar problems that I'm seeing over HDMI (left side and center sections are inverted, section cut off on the far right side of the screen, 2 vertical bars), but by setting the Vtotal = 1130, Htotal = 2100, Hporch = 90, I'm able to achieve the correct image:

    Default settings:

    I've kept MODE_SEL0 on the 948 on the 5th switch. I'm connected to the 949 for this PATGEN.

  • 0 in reply to Bruce Deng
    TI__Mastermind 33715 points

    Hi Bruce,

    Tomorrow I will send over a script that will program the EDID for the correct timing. In the meantime, I recommend that you download AW EDID Editor (version 2.00.13) and try programming the EDID using the ALP EDID SRAM feature.

    Best,

    Jack

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    Hello,

    I'd like to follow up on this. Is there a script I can use to program the EDID for the correct timing?

    Thank you

  • 0 in reply to Bruce Deng
    TI__Mastermind 33715 points

    Hi Bruce,

    I have attached the script that will program the above EDID block into the 949.

    Best,

    Jack

    Fullscreen 949_EDID.py Download 
    # Script to load EDID using built-in ALP routines

exEDID = [0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x04,0x21,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x00,0x01,0x03,0x80,0x26,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,
0x01,0x00,0x01,0x00,0x01,0x00,0x84,0x3A,0x80,0xB4,0x70,0x38,0x32,0x40,0x50,0x28,
0x85,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC8,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00]


# Write to EDID (start offset, data, length)
board.EDID_Write(0x0, exEDID, 256)

# Readback EDID
read_edid = board.EDID_Read(0x0, 256)
print "EDID readback:"
print read_edid

  • 0 in reply to Jack Scherlag
    Prodigy 90 points

    Got it, thank you so much for the help!