DP83822IF: DP83822IF

Hi Hezi,

My guess is that RX_DV is somehow driven high from the FPGA. Any stray voltage on RX_DV at power-up can latch the device into RMII mode and cause this issue.

Can you please connect RX_DV and measure the waveform during the power-up or RESET_N toggle?

Can you also read the following registers (0x00 to 0x1F, 0x0467, 0x0468) during the state when device is not linking up?

--
Regards,
Gokul.

Hi Gokul,

Thanks for your response

RX_DV signal on Power on

RX_DV signal on RESET_N toggle

When we set by MDIO DP83822 to:

PHY to 10M
PC to 10M

Disable autonegotiation  

We have Link

When set the PHY to 100M   lost the link

Our MAC (ZYNQ 7000) Support only RGMII v2.0 (PHY devices with HSTL Class 1 drivers and receivers)

Register Dump:

read reg 0x0=   0x3100
read reg 0x1=   0x786D
read reg 0x2=   0x2000
read reg 0x3=   0xA240
read reg 0x4=   0x1E1
read reg 0x5=   0x21
read reg 0x6=   0x4
read reg 0x7=   0x2001
read reg 0x8=   0x0
read reg 0x9=   0x0
read reg 0xA=   0x100
read reg 0xB=   0x1000
read reg 0xC=   0x0
read reg 0xD=   0x401F
read reg 0xE=   0xA240
read reg 0xF=   0x0
read reg 0x10=  0x4013
read reg 0x11=  0x108
read reg 0x12=  0x0
read reg 0x13=  0x0
read reg 0x14=  0x0
read reg 0x15=  0x0
read reg 0x16=  0x100
read reg 0x17=  0x1E1
read reg 0x18=  0x400
read reg 0x19=  0x803F
read reg 0x1A=  0x0
read reg 0x1B=  0x7D
read reg 0x1C=  0x5EE
read reg 0x1D=  0x0
read reg 0x1E=  0x2
read reg 0x467= 0xFFF3
read reg 0x468= 0xF

What can be the problem ?

Any other information we can send you for diagnostic 

We need informatiom how setup loopback modes  and how to make trafic on the line  (PC to PHY and PHY to PC)

and troubleshooting guide for DP83822

Thanks in advance,

Hezi 

Hi Hezi,

I see from the logs that all the straps are latched to Mode4. But in the schematic, I don't see any pull up resistors on RX_D pins.

From the image, you captured some pulse on RX_DV. Can you please capture the waveforms along with RESET_N so that we can look at timing of the pulse with respect to RESET_N?

--
Regards,
Gokul.

Hi Gokul,

Thanks for your help

Waveform:

RX_DV vs RESET_N

Close up 

RX_DV vs 1.8V

RX_DV vs 3.3V

Which setting we need to configure for RGMII mode

• MDIO - Register set
• Bootstarp resistors 

Regards,

Hezi

Hi Hezi,

I am not able to conclude why straps are getting latched wrong from these plots.

For strap resistors to be mounted for RGMII mode, please refer to section 8.5.1 in the datasheet.

On MDIO register set, I can propose the registers. But the problem I see is that if the straps are latched wrong, PHY can go into RMII 50M mode by mistake and register access might not be available for you to change the MAC interface mode.

--
Regards,
Gokul.