TCAN4550-Q1: Linux device tree overlay help

I am trying to port the TCAN4550 on the NVIDIA Jetson Orin Nano, but am having trouble doing so with their build tools. When I compile from the .dts file to a .dtbo file I don't see any warnings/errors, but I when I decompile that .dtbo file back to a .dts file I get the following errors:

decomp_tcan.dts: Warning (unit_address_vs_reg): /__local_fixups__/fragment@5/__overlay__/tcan4x5x@0: node has a unit name, but no reg property
decomp_tcan.dts: Warning (gpios_property): /__fixups__:gpio: property size (102) is invalid, expected multiple of 4
decomp_tcan.dts: Warning (interrupts_property): /fragment@5/__overlay__/tcan4x5x@0:interrupt-parent: Invalid phandle
decomp_tcan.dts: Warning (interrupts_property): /fragment@5/__overlay__/tcan4x5x@0: Missing interrupt-parent

Can you please take a look at my .dts file (below) and let me know if there are any issues?

/dts-v1/;
/plugin/;
/ {
        jetson-header-name = "Jetson 40pin Header";
        overlay-name = "TCAN4X5X";
        compatible = "nvidia,p3768-0000+p3767-0000\0nvidia,p3768-0000+p3767-0001\0nvidia,p3768-0000+p3767-0003\0nvidia,p3768-0000+p3767-0004\0nvidia,p3768-0000+p3767-0005\0nvidia,p3509-0000+p3767-0000\0nvidia,p3509-0000+p3767-0001\0nvidia,p3509-0000+p3767-0003\0nvidia,p3509-0000+p3767-0004\0nvidia,p3509-0000+p3767-0005";

        fragment@0 {
                target = <&spi3>;
                __overlay__ {
                        status = "okay";
                };
        };

        fragment@1 {
                target = <&spidev3>;
                __overlay__ {
                        status = "disabled";
                };
        };

        fragment@2 {
                target = <&pinmux>;

                __overlay__ {
                        pinctrl-names = "default";
                        pinctrl-0 = <&hdr40_pinmux>;

                        hdr40_pinmux: header-40pin-pinmux {
                                hdr40-pin13 {
                                        nvidia,pins = "spi3_sck_py0";
                                        nvidia,function = "spi3";
                                        nvidia,tristate = <0x00>;
                                        nvidia,enable-input = <0x01>;
                                };

                                hdr40-pin16 {
                                        nvidia,pins = "spi3_cs1_py4";
                                        nvidia,function = "spi3";
                                        nvidia,tristate = <0x00>;
                                        nvidia,enable-input = <0x01>;
                                };

                                hdr40-pin18 {
                                        nvidia,pins = "spi3_cs0_py3";
                                        nvidia,function = "spi3";
                                        nvidia,tristate = <0x00>;
                                        nvidia,enable-input = <0x01>;
                                };

                                hdr40-pin22 {
                                        nvidia,pins = "spi3_miso_py1";
                                        nvidia,function = "spi3";
                                        nvidia,tristate = <0x00>;
                                        nvidia,enable-input = <0x01>;
                                };

                                hdr40-pin37 {
                                        nvidia,pins = "spi3_mosi_py2";
                                        nvidia,function = "spi3";
                                        nvidia,tristate = <0x00>;
                                        nvidia,enable-input = <0x01>;
                                };
                        };
                        tcan4x5x_pins: tcan4x5x_pins {
                                hdr40-pin36 {
                                        nvidia,pins = "uart1_cts_pr5";
                                        nvidia,function = "rsvd1";
                                        nvidia,tristate = <0x00>;
                                        nvidia,enable-input = <0x01>;
                                };
                        };
                };
        };



        fragment@4 {
                target-path = "/";
                __overlay__ {
                        clocks {
                                can_clock: can_clock {
                                        compatible =  "fixed-clock";
                                        #clock-cells = <0>;
                                        clock-frequency =  <40000000>;
                                        clock-accuracy = <100>;
                                };
                        };
                };
        };

        fragment@5 {
                target = <&spi3>;
                __overlay__ {
                            #address-cells = <1>;
                            #size-cells = <0>;
                            tcan4x5x: tcan4x5x@0 {
                                    compatible = "ti,tcan4x5x";
                                    reg = <0>;
                                    spi-max-frequency = <10000000>;
                                    bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
                                    nvidia,enable-hw-based-cs;
                                    nvidia,rx-clk-tap-delay = <0x7>;
                                    clocks = <&can_clock>;
                                    pinctrl-names = "default";
                                    pinctrl-0 = <&tcan4x5x_pins>;
                                    interrupt-parent = <&gpio>;
                                    interrupts = <&gpio 141  0x2>;
                                    controller-data {
                                        nvidia,cs-setup-clk-count = <0x1e>;
                                        nvidia,cs-hold-clk-count  = <0x1e>;
                                        nvidia,rx-clk-tap-delay  = <0x1f>;
                                        nvidia,tx-clk-tap-delay  = <0x0>;
                            };
                    };
            };
    };
};