DP83822I: The EtherCAT clock interface requirement

Hi team,

I have a question about the clock interface requirement in the EtherCAT application.

In another e2e:

(+) TMS320F28P650SH: Clock configuration for ESC and PHY - C2000︎ microcontrollers - INTERNAL forum - C2000︎ microcontrollers - INTERNAL - TI E2E support forums

The clock requirement of the EtherCAT application is explained as 25 ppm.

And in the datasheet of our DP83822, the clock interface requirement is explained as 100 ppm.

Thus, the question I want to ask is:

1. Is the clock interface requirement more strict in the EtherCAT application? And it must be 25ppm?

Thanks and best regards,

Matt.