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DS90UB934-Q1EVM: Does TI have a reference EVM that supports DS90UB934-Q1EVM and can output screen images?

Jimmy WANG
Genius 3055 points
Part Number: DS90UB934-Q1EVM
Other Parts Discussed in Thread: DS90UB934-Q1, DS90UB954-Q1

Hi team,

Does TI have a reference EVM that supports DS90UB934-Q1EVM and can output screen images?

other question below 

1. Can DS90UB954-Q1 be connected to DS90UB933TRTVRQ1 through POC and work normally? Is it the same as DS90UB934-Q1? Which register needs to be changed? Is it p2p with DS90UB934?

2. How to make DS90UB934 correctly receive data from DS90UB933? 

  • 0
    TI__Mastermind 18590 points

    Hello Jimmy,

    The 934 EVM outputs parallel LVCMOS video data and typically requires a processor to convert that data for a display. There are some reference designs that may be helpful:

    https://e2e.ti.com/support/tools/simulation-hardware-system-design-tools-group/sim-hw-system-design/f/simulation-hardware-system-design-tools-forum/1277489/tida-01004-how-to-get-an-image-of-the-ar0140at-image-sensor-in-an-easy-way

    https://e2e.ti.com/support/interface-group/interface/f/interface-forum/979091/ds90ub934-q1evm-ds90ub934-q1evm-to-hdmi

    1. The 954 is a deserializer that is compatible to the 933 serializer. The 954 just needs to be set to DVP mode and configured to convert the parallel data on the 933 side to CSI-2 packets. The PoC network just needs to be able to target the operating frequency band of DVP mode, which is approximately ~1MHz - 1GHz, and meet the Insertion Loss and Return Loss requirements of our devices across the entire channel.
      1. A pairing of the 933/934 is supported and is possible with PoC implemented. The specific PoC networks implemented on the SER and DES sides of the system just need to be carefully selected to minimize Insertion Loss and Return Loss across the entire channel.
      2. The 934 has parallel video outputs, while the 954 has CSI-2 video outputs. The pin functionality is different and is not p2p.
    2. If the system consists of a 933/934, then you first need to confirm that both devices are set to the correct MODES.
      1. On the 933, select either "PCLK from Imager as REFCLK" or "External Oscillator REFCLK" modes.
        1. If using the PCLK as REFCLK, make sure it meets our jitter requirements, as defined in the 933  datasheet.
        2. If using the External Oscillator as REFCLK, make sure the ratio of PCLK to External clock meets the fixed ratio.
          1. The pixel clock to external oscillator ratios must be fixed for the 12–bit mode and the 10–bit mode. In the 10-bit mode, the pixel clock frequency divided by the external oscillator frequency must be 2. In the 12-bit mode, the pixel clock frequency divided by the external oscillator frequency must be 1.5.
      2. On the 934, select RAW12HF, RAW12LF, or RAW10 modes.
      3. Once everything is set to the intended mode, then the data lines on the 933 serializer (DIN[11:0], VSync, HSync) will be sampled at every rising or falling edge of the inputted PCLK signal. Parallel data that is sampled on the 933 will be re-created on the corresponding pins on the connected 934 deserializer (ROUT[11:0], VSync, HSync). That means there needs to be an active PCLK signal and parallel video data being fed into the 933 serializer, in order to transfer video data to the 934 deserializer side.

    Best,

    Justin Phan