Part Number: DS250DF230
Hi,
(1) Could you please tell me that after the RAW (CDR not Lock) state, the time between when the CDR Lock is asserted and when the Retimed data is output? [RAW → Retimed]
(2) How does the output voltage change when RAW→ Retimed? Is indefinite data output?
(3) Could you please tell me that after the Retimed (CDR Lock) state, the time between when the CDR Lock is deasserted and when the RAW data is output? [Retimed → RAW]
(4) How does the output voltage change when Retimed→ RAW? Is indefinite data output?
(5) Could you please tell me that after the Retimed (CDR Lock) state, the time between when the CDR Lock is deasserted and when the mute data is output? [Retimed → mute]
(6) How does the output voltage change when Retimed→ mute? Is indefinite data output?
Best Regards,
Nishie
