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Original question:

DP83869HM: Link not coming up

DP83869HM: AM5748 - DP83869HM Link Not Up.

Chaithra Kulal
Prodigy 30 points
Part Number: DP83869HM
Other Parts Discussed in Thread: AM5748

Hello,

DP83869HM is interface to AM5748 through RGMII0 interface. Communication is established but link is not up. Since we are using RGMII to Copper mode, the GTX_CLK must be 125MHz but we are getting 2.5MHz. So Is this because of the GTX_CLK, link is not up or any other configuration is required. In hardware strapping PHY_ADD is set to 0XC and OPMODE[2:0]=000 which is RGMII to Copper Mode. What are the register configuration to be made to set into this mode?

Thanks,

Chaithra Kulal

  • 0
    TI__Mastermind 25955 points

    Hi Chaithra,

    When the PHY is not able to link up, this means PHY the problem should be in MDI mode.

    Here is some questions I would like to ask:

    • What is the link partner?
    • Could you provide the register 0x0000 to 0x001F?
    • Could you also probe CLK_OUT to make sure the clock is generate properly?

    --

    Thank you,

    Hillman Lin

  • 0
    Prodigy 30 points

    Hello Hillman Lin, 

    With some Hardware Changes, we are able to do link up in 1000Base-X mode. But in Loopback mode, Link is not Up. And when we set PHY_ADD [3:0] = 0000 in Hardware Strapping, in software not able to read for that Phy address instead it reads for 1111(F). In hardware mode setting is proper, what is the software configuration is required to set PHY_ADD same as hardware strapping.

    Thanks

    Chaithra Kulal

  • +1 in reply to Chaithra Kulal
    TI__Mastermind 25955 points

    Hi Chaithra,

    It seems like you are not reading the register information correctly. When you see register value FFFF that means MDIO communication is functioning correctly.

    Here are some suggestion to debug MDIO communication:

    • Could you probe MDIO lines and MDC lines.
    • Make sure both processor have PHY have the same VDDIO level
    • Do check if MDIO have a pull up 2.2kohms resistor to MDIO lines

    --

    Regards,

    Hillman Lin

  • 0 in reply to Hillman Lin
    Prodigy 30 points

    Hi Hillman Lin,

    The MDIO signal levels are same, and we also provided 2.2Kohms pullup to MDIO_D line. But still the same issue exists.

    Thanks,

    Chaithra Kulal