Hi, this is Maruyana
Is there a failure mode where LVDS-A and -B become in phase like the attached waveform?
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Hi, this is Maruyana
Is there a failure mode where LVDS-A and -B become in phase like the attached waveform?
Hello,
The receiver input threshold (failsafe) (datasheet section 10.2.2.7) detects open-circuit and idle-bus conditions for the SN65MLVD204A (Type 2 receiver). Did you probe the input signal to see what it looks like? What types of probes are you using for measuring the differential output?
Regards, Amy