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TCAN4550EVM: No CLK source defined

Sai Kiran Y
Prodigy 60 points
Part Number: TCAN4550EVM
Other Parts Discussed in Thread: TCAN4550,

Hi,

I am trying to interface TCAN4550 with a Linux board. On boot up, the kernel logs show that the clock source is not defined. And the probe of tcan4x5x driver fails. 

This is my log. 

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tcan4x5x spi1.0: TCAN: tcan4x5x probe
TCAN: tcan4x5x probe
[DEBUG]-----------tcan4x5x_can_probe,spi device: tcan4x5x, irq:49
tcan4x5x spi1.0: TCAN: Allocating memory
tcan4x5x spi1.0: no clock found
tcan4x5x spi1.0: TCAN: no CAN clock source defined
tcan4x5x spi1.0: TCAN: SPI CLK freq is 1000000
tcan4x5x spi1.0: TCAN: Parsing config
tcan4x5x spi1.0: TCAN: configuring SPI
tcan4x5x spi1.0: TCAN: tcan4x5x init
TCAN: tcan4x5x init
TCAN: tcan4x5x clear interrupts start
TCAN: tcan4x5x status flags clear start
TCAN: tcan4x5x status flags clear end, ret = 0
TCAN: tcan4x5x enable mcan interrupts function start
TCAN: tcan4x5x enable mcan interrupts function end, ret = 0
TCAN: tcan4x5x interrupt flags clear start
TCAN: tcan4x5x interrupt flags clear end, ret = 0
TCAN: tcan4x5x error status clear start
TCAN: tcan4x5x error status clear end, ret = 0
TCAN: tcan4x5x clear interrupts end, ret = 0
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Device tree:

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&spi1{
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
rtk,spi-for-kernel = <1>;
rtk,spi-slave-mode = <0>; // SPI master
rtk,spi-cs-gpios = <&gpioa 2 0>;
status = "okay";
tcan4x5x: tcan4x5x@0 {
compatible = "ti,tcan4x5x";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <10000000>;
bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
interrupt-parent = <&gpioa>;
interrupts = <8 IRQ_TYPE_EDGE_BOTH>;
device-state-gpios = <&gpioa 1 0>;
device-wake-gpios = <&gpioa 6 0>;
reset-gpios = <&gpioa 0 0>;
};
};
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Could someone please help me out here?

  • 0
    TI__Guru 52025 points

    Hi Sai,

    We do not directly support the Linux drivers for this device as they are managed by the open-source community, so our expertise here may be limited. We will be able to help much more with questions regarding the TCAN4550 itself. 

    The SPI interface will have its clock signal controlled by the MCU of the system so the clock source will likely be referenced to a crystal connected directly to the processor. The CAN clock for the TCAN4550 is often a separate crystal near the IC and can be a 20MHz or 40MHz oscillator. The missing field here is likely needing to know what value to use for this CAN clock source so that the CAN data rate can be determined correctly. 

    The TCAN4550EVM comes with a 40MHz crystal on the board so if this may be used to configure the drivers for the correct CAN data rate configuration. 

    Let me know if this is what you are looking for and if you have any more questions. 

    Regards, 
    Eric Schott

  • 0 in reply to Eric Schott1
    Prodigy 60 points

    Hi Eric,

    Thanks for the response. I understand that there is no direct support for the Linux Drivers. I am trying to understand the expected behavior of TCAN4550. Please find the waveforms for the above logs.

    Let me know if there is something off in waveforms.

    Thanks,
    Sai Kiran.

  • 0 in reply to Sai Kiran Y
    TI__Guru 52025 points

    Hi Sai,

    Thanks for sharing the logic analyser shots here. It looks like there are a few things that are not consistent with expected SPI operation with TCAN4550. 

    The first byte of each transaction (after SPI-Enable drives low) is expected to be either a read command (READ_B_FL = 8'h41 ) or write command (WRITE_B_FL = 8'h61). In the first several transactions this first byte does not include these values and byte values of 0x00 or 0x20 are common. This would be an invalid input for TCAN4550 and would cause a SPI error and any data would be ignored. 

    It's also clear that the MISO line is idle during the entire capture here. Even with invalid commands in the first byte, I still expect the TCAN4550 to transmit the value of the interrupt register (h0820) during the first byte of the transaction. This leads me to believe there is an issue either with the clock input to the TCAN4550 or the logic analyzer is not properly recognizing the data coming from the device. Please ensure that the logic analyzer is capable of detecting the logic levels that the TCAN4550 is driving based on the Vio supply to the device. I also recommend checking that the crystal oscillator is working correctly. You can check this by trying to read any register between h0000 - h000C. These registerer are accessible without the need of the oscillator active whereas all other registers including the interrupt register (h0820) need this oscillator input to be active and stable. 

    Regards, 
    Eric Schott