1. Does a QSFP28 100G port use 2 pieces of DS250DF410, and one piece (schematic bit U68) of CAL-CLK-OUT must be connected to the other piece (schematic bit U70) of CAL-CLK-IN? Or can we provide separate clocks for the two chips?
2. Taking the schematic diagram in the attachment as an example, U68 and U69 chips are used for PORT1 and PORT2 respectively. For wiring considerations, can the CAL-CLK-OUT of U68 be connected to the CAL-CLK-IN of U69?