PCA9306-Q1: When Vcc2 = Vcc1 what is Vth range for EN?

Justin Bohr

Part Number: PCA9306-Q1

Tool/software:

Hi Team,

In a scenario such as figure 9-5 in the PCA9306-Q1 datasheet where Vcc2 = Vcc1, or Vref2 = Vref1, what are the thresholds for EN?

Thanks,

Justin

11 months ago

0 Michael Ikwuyum 11 months ago

TI__Guru 50146 points

Hi Justin,

0.6 V, thanks.

Best Regards,

Michael.

0 Justin Bohr 11 months ago in reply to Michael Ikwuyum

TI__Mastermind 27980 points

Thanks Michael,

What would be the Enable/Disable Thresholds? Understood on the Vth is 0.6V (my bad on the wording of the question), but most of the application examples say that the min High value for EN is Vref1+Vth. if Vref1 = Vref2 what is the min value for a logic high, and the max value for a logic low?

Justin

0 Clemens Ladisch 11 months ago in reply to Justin Bohr

Guru 316470 points

The EN pin is an analog pin and does not really have thresholds. The EN pin is connected directly to the gates of the pass transistors, so the I/Os are clamped at EN − Vth. To disable the I/Os, EN should be much lower than 0.6 V; to enable the I/Os, EN should be much higher than 0.6 V. (For a high input voltage, the switch is open, and the output voltage is determined by the pull-up resistor at the output.)

Also see [FAQ] How do the LSF translators work?

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PCA9306-Q1: When Vcc2 = Vcc1 what is Vth range for EN?