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Tool/software:
Hi Team,
We are using DS100KR401SQE/NOPB in our design for 10G Ethernet links (Do not require link training ) from FPGA to SFP+ interface through back plane connections.
We set the redriver in limiting mode by connecting mode pin with 1K pull down resistor to GND. We connected SD_TH pin pull up to VDD through 1K resistor.
During 10G Link validation test we observed that link is getting up, But it creating errors randomly. We tried to optimize the link setting (VOD,EQ,DEM) of DS100KR401, but still we can not achieve the error free channels.
We tried to isolate the redriver by replacing other FPGA card that does not have redriver in the signal path. In these case we can able to achieve error free operation.
We tried to set the redriver in INB to OUTA loop back mode by writing 21 value in 0x02 register. Refer attached image for loop back operation. In this mode also we are getting random errors.
We tried to set the redriver in INA to OUTB loop back mode by writing 11 value in 0x02 register.In this mode we are getting error free channels.
Question 1: Can you please suggest what is the suggested setting for 10GbE interface in optical link(With out Auto Negotiation)?
Question 2: Whether (VOD,EQ,DEM) setting applied during the redriver loop back operation also or these values will be ignored?
Question 3: How SI parameters handled during internal loop back operation inside redriver?
Thanks in advance,
Shenbagavalli.
