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DS90UB929-Q1EVM: Display with DS90UB948-Q1EVM remains black

Part Number: DS90UB929-Q1EVM
Other Parts Discussed in Thread: DS90UB948-Q1EVM, DS90UB949-Q1EVM, ALP,

Tool/software:

Display with deserializer: DS90UB948-Q1EVM
Serializer: DS90UB949-Q1EVM

ALP + Profile Update: v1.57.0010

Serializer is set to default config:

Register of Serializer:

[REGISTERS]
Device = ALP Nano 1 - DS90UB949, Connector 1
Comments = "DS90UB949-Q1EVM_TDS"
Date = 10/25/2024
Time = 15:28:58
Reg = 0,0x0000,0x18
Reg = 0,0x0001,0x00
Reg = 0,0x0003,0xDA
Reg = 0,0x0004,0x80
Reg = 0,0x0005,0x00
Reg = 0,0x0006,0x58
Reg = 0,0x0007,0xA0
Reg = 0,0x0008,0xB0
Reg = 0,0x0009,0x00
Reg = 0,0x000A,0x13
Reg = 0,0x000B,0x00
Reg = 0,0x000C,0x07
Reg = 0,0x000D,0x20
Reg = 0,0x000E,0x00
Reg = 0,0x000F,0x00
Reg = 0,0x0010,0x00
Reg = 0,0x0011,0x00
Reg = 0,0x0012,0x00
Reg = 0,0x0013,0x99
Reg = 0,0x0014,0x00
Reg = 0,0x0015,0x01
Reg = 0,0x0016,0xFE
Reg = 0,0x0017,0x1E
Reg = 0,0x0018,0x7F
Reg = 0,0x0019,0x7F
Reg = 0,0x001A,0x09
Reg = 0,0x001B,0x00
Reg = 0,0x001C,0x00
Reg = 0,0x001D,0x00
Reg = 0,0x001E,0x05
Reg = 0,0x001F,0xF7
Reg = 0,0x0020,0x0B
Reg = 0,0x0021,0x00
Reg = 0,0x0022,0x25
Reg = 0,0x0023,0x00
Reg = 0,0x0024,0x00
Reg = 0,0x0025,0x00
Reg = 0,0x0026,0x00
Reg = 0,0x0027,0x00
Reg = 0,0x0028,0x01
Reg = 0,0x0029,0x20
Reg = 0,0x002A,0x20
Reg = 0,0x002B,0xA0
Reg = 0,0x002C,0x00
Reg = 0,0x0030,0x00
Reg = 0,0x0031,0x00
Reg = 0,0x0032,0x00
Reg = 0,0x0033,0x00
Reg = 0,0x0034,0x00
Reg = 0,0x0035,0x00
Reg = 0,0x0036,0x00
Reg = 0,0x0037,0x00
Reg = 0,0x0038,0x00
Reg = 0,0x0039,0x00
Reg = 0,0x003A,0x00
Reg = 0,0x003B,0x00
Reg = 0,0x003C,0x00
Reg = 0,0x003D,0x00
Reg = 0,0x003E,0x00
Reg = 0,0x003F,0x00
Reg = 0,0x0040,0x14
Reg = 0,0x0041,0x5C
Reg = 0,0x0042,0x00
Reg = 0,0x0043,0x00
Reg = 0,0x0044,0x80
Reg = 0,0x0045,0x00
Reg = 0,0x0046,0x00
Reg = 0,0x0047,0x00
Reg = 0,0x0048,0x01
Reg = 0,0x0049,0x68
Reg = 0,0x004A,0x01
Reg = 0,0x004B,0x38
Reg = 0,0x004C,0x04
Reg = 0,0x004D,0x00
Reg = 0,0x004E,0x00
Reg = 0,0x004F,0x00
Reg = 0,0x0050,0x97
Reg = 0,0x0051,0xA1
Reg = 0,0x0052,0x1E
Reg = 0,0x0053,0x00
Reg = 0,0x0054,0x09
Reg = 0,0x0055,0x0C
Reg = 0,0x0056,0x15
Reg = 0,0x0057,0x00
Reg = 0,0x0058,0x00
Reg = 0,0x0059,0x00
Reg = 0,0x005A,0xCD
Reg = 0,0x005B,0x60
Reg = 0,0x005C,0x02
Reg = 0,0x005D,0x06
Reg = 0,0x005E,0x44
Reg = 0,0x005F,0x96
Reg = 0,0x0060,0x22
Reg = 0,0x0061,0x02
Reg = 0,0x0062,0x00
Reg = 0,0x0064,0x10
Reg = 0,0x0065,0x00
Reg = 0,0x0066,0x00
Reg = 0,0x0067,0x00
Reg = 0,0x0068,0x00
Reg = 0,0x0069,0x00
Reg = 0,0x006A,0x00
Reg = 0,0x006B,0x00
Reg = 0,0x006C,0x00
Reg = 0,0x0070,0x00
Reg = 0,0x0071,0x00
Reg = 0,0x0072,0x00
Reg = 0,0x0073,0x00
Reg = 0,0x0074,0x00
Reg = 0,0x0075,0x00
Reg = 0,0x0076,0x00
Reg = 0,0x0077,0x00
Reg = 0,0x0078,0x00
Reg = 0,0x0079,0x00
Reg = 0,0x007A,0x00
Reg = 0,0x007B,0x00
Reg = 0,0x007C,0x00
Reg = 0,0x007D,0x00
Reg = 0,0x0080,0x00
Reg = 0,0x0081,0x00
Reg = 0,0x0082,0x00
Reg = 0,0x0083,0x00
Reg = 0,0x0084,0x00
Reg = 0,0x0090,0x00
Reg = 0,0x0091,0x00
Reg = 0,0x0092,0x00
Reg = 0,0x0093,0x00
Reg = 0,0x0094,0x00
Reg = 0,0x0098,0x00
Reg = 0,0x0099,0x00
Reg = 0,0x009A,0x00
Reg = 0,0x009B,0x00
Reg = 0,0x009C,0x00
Reg = 0,0x009D,0x00
Reg = 0,0x009E,0x00
Reg = 0,0x009F,0x00
Reg = 0,0x00A0,0x00
Reg = 0,0x00A1,0x00
Reg = 0,0x00A2,0x00
Reg = 0,0x00A3,0x00
Reg = 0,0x00C0,0x00
Reg = 0,0x00C1,0x00
Reg = 0,0x00C2,0xA8
Reg = 0,0x00C3,0x00
Reg = 0,0x00C4,0x68
Reg = 0,0x00C5,0x00
Reg = 0,0x00C6,0x00
Reg = 0,0x00C7,0xE0
Reg = 0,0x00C8,0xC0
Reg = 0,0x00C9,0x00
Reg = 0,0x00CA,0x00
Reg = 0,0x00CB,0x00
Reg = 0,0x00CC,0x00
Reg = 0,0x00CE,0xFF
Reg = 0,0x00D0,0x00
Reg = 0,0x00D1,0xA1
Reg = 0,0x00D2,0x00
Reg = 0,0x00D3,0x46
Reg = 0,0x00E0,0x00
Reg = 0,0x00E1,0x00
Reg = 0,0x00E2,0xA8
Reg = 0,0x00E3,0x00
Reg = 0,0x00E4,0x68
Reg = 0,0x00E5,0x38
Reg = 0,0x00E6,0x00
Reg = 0,0x00E7,0x20
Reg = 0,0x00F0,0x5F
Reg = 0,0x00F1,0x55
Reg = 0,0x00F2,0x42
Reg = 0,0x00F3,0x39
Reg = 0,0x00F4,0x34
Reg = 0,0x00F5,0x39
Reg = 0,0x00F6,0x00
Reg = 0,0x00F8,0x00
Reg = 0,0x00F9,0x00

Register of Deserializer (Display):

[REGISTERS]
Device = ALP Nano 1 - DS90UB948, Connector 1
Comments = "DS90UB948_Q1EVM_1920*1080"
Date = 10/25/2024
Time = 15:32:56
Reg = 0,0x0000,0x58
Reg = 0,0x0001,0x04
Reg = 0,0x0002,0x00
Reg = 0,0x0003,0xF0
Reg = 0,0x0004,0xFE
Reg = 0,0x0005,0x1E
Reg = 0,0x0006,0x00
Reg = 0,0x0007,0x18
Reg = 0,0x0008,0x00
Reg = 0,0x0009,0x00
Reg = 0,0x000A,0x00
Reg = 0,0x000B,0x00
Reg = 0,0x000C,0x00
Reg = 0,0x000D,0x00
Reg = 0,0x000E,0x00
Reg = 0,0x000F,0x00
Reg = 0,0x0010,0x00
Reg = 0,0x0011,0x00
Reg = 0,0x0012,0x00
Reg = 0,0x0013,0x00
Reg = 0,0x0014,0x00
Reg = 0,0x0015,0x00
Reg = 0,0x0016,0x00
Reg = 0,0x0017,0x00
Reg = 0,0x0018,0x00
Reg = 0,0x0019,0x01
Reg = 0,0x001A,0x00
Reg = 0,0x001B,0xF5
Reg = 0,0x001C,0x3B
Reg = 0,0x001D,0x10
Reg = 0,0x001E,0x00
Reg = 0,0x001F,0x00
Reg = 0,0x0020,0x00
Reg = 0,0x0021,0x00
Reg = 0,0x0022,0x40
Reg = 0,0x0023,0x20
Reg = 0,0x0024,0x08
Reg = 0,0x0025,0x00
Reg = 0,0x0026,0x14
Reg = 0,0x0027,0x26
Reg = 0,0x0028,0x19
Reg = 0,0x0029,0x00
Reg = 0,0x002A,0x00
Reg = 0,0x002B,0x00
Reg = 0,0x002C,0x00
Reg = 0,0x002D,0x00
Reg = 0,0x002E,0x00
Reg = 0,0x002F,0x00
Reg = 0,0x0030,0x00
Reg = 0,0x0031,0x00
Reg = 0,0x0032,0x90
Reg = 0,0x0033,0x25
Reg = 0,0x0034,0x01
Reg = 0,0x0035,0x00
Reg = 0,0x0036,0x00
Reg = 0,0x0037,0x8D
Reg = 0,0x0038,0x00
Reg = 0,0x0039,0x00
Reg = 0,0x003A,0x00
Reg = 0,0x003B,0x00
Reg = 0,0x003C,0x20
Reg = 0,0x003D,0xE0
Reg = 0,0x003E,0x23
Reg = 0,0x003F,0x00
Reg = 0,0x0040,0x43
Reg = 0,0x0041,0x03
Reg = 0,0x0042,0x03
Reg = 0,0x0043,0x00
Reg = 0,0x0044,0x60
Reg = 0,0x0045,0x88
Reg = 0,0x0046,0x00
Reg = 0,0x0047,0x00
Reg = 0,0x0048,0x0F
Reg = 0,0x0049,0x81
Reg = 0,0x004A,0x00
Reg = 0,0x004B,0x08
Reg = 0,0x004C,0x00
Reg = 0,0x004D,0x00
Reg = 0,0x004E,0x63
Reg = 0,0x004F,0x00
Reg = 0,0x0050,0x03
Reg = 0,0x0051,0x10
Reg = 0,0x0052,0x00
Reg = 0,0x0053,0x01
Reg = 0,0x0054,0x80
Reg = 0,0x0055,0x00
Reg = 0,0x0056,0x00
Reg = 0,0x0057,0x00
Reg = 0,0x0058,0x00
Reg = 0,0x0059,0x7F
Reg = 0,0x005A,0x20
Reg = 0,0x005B,0x20
Reg = 0,0x005C,0x00
Reg = 0,0x005D,0x00
Reg = 0,0x005E,0x00
Reg = 0,0x005F,0x00
Reg = 0,0x0060,0x00
Reg = 0,0x0061,0x00
Reg = 0,0x0062,0x00
Reg = 0,0x0063,0x00
Reg = 0,0x0064,0x10
Reg = 0,0x0065,0x00
Reg = 0,0x0066,0x00
Reg = 0,0x0067,0x00
Reg = 0,0x0068,0x00
Reg = 0,0x0069,0x00
Reg = 0,0x006E,0x00
Reg = 0,0x006F,0x00
Reg = 0,0x0070,0x00
Reg = 0,0x0071,0x00
Reg = 0,0x0072,0x00
Reg = 0,0x0073,0x07
Reg = 0,0x0074,0x07
Reg = 0,0x0075,0x08
Reg = 0,0x0076,0x00
Reg = 0,0x0077,0x00
Reg = 0,0x0078,0x00
Reg = 0,0x0079,0x00
Reg = 0,0x007A,0x00
Reg = 0,0x007B,0x6D
Reg = 0,0x007C,0x02
Reg = 0,0x0080,0x00
Reg = 0,0x0081,0x00
Reg = 0,0x0082,0x00
Reg = 0,0x0083,0x00
Reg = 0,0x0084,0x00
Reg = 0,0x0090,0x00
Reg = 0,0x0091,0x00
Reg = 0,0x0092,0x00
Reg = 0,0x0093,0x00
Reg = 0,0x0094,0x00
Reg = 0,0x0098,0x00
Reg = 0,0x0099,0x00
Reg = 0,0x009A,0x00
Reg = 0,0x009B,0x00
Reg = 0,0x009C,0x00
Reg = 0,0x009D,0x00
Reg = 0,0x009E,0x00
Reg = 0,0x009F,0x00
Reg = 0,0x00C0,0x00
Reg = 0,0x00C1,0x00
Reg = 0,0x00C3,0x00
Reg = 0,0x00C4,0x00
Reg = 0,0x00C5,0x00
Reg = 0,0x00C8,0xC0
Reg = 0,0x00C9,0x00
Reg = 0,0x00CA,0x00
Reg = 0,0x00CB,0x00
Reg = 0,0x00CC,0x00
Reg = 0,0x00E0,0x00
Reg = 0,0x00E1,0x00
Reg = 0,0x00E2,0x00
Reg = 0,0x00E3,0x00
Reg = 0,0x00E8,0x00
Reg = 0,0x00E9,0x00
Reg = 0,0x00EA,0x00
Reg = 0,0x00F0,0x5F
Reg = 0,0x00F1,0x55
Reg = 0,0x00F2,0x42
Reg = 0,0x00F3,0x39
Reg = 0,0x00F4,0x34
Reg = 0,0x00F5,0x38
Reg = 0,0x00F6,0x00
Reg = 0,0x00F8,0x00
Reg = 0,0x00F9,0x00

ALP Software:

 I have disconnected the HDMI source and tried to use the “Pattern Generator”. But the “Pattern Generator” tab only opens if the ALP Profile Update is not installed.

Does the Serializer DS90UB929-Q1EVM not have a “Pattern Generator” even though the tab is displayed?

Or is there another way to get the correct configuration so that my display works as it should?

Because I've tried many things I've found on the forum and nothing has worked so far.

  • Hi Iris,

     I have disconnected the HDMI source and tried to use the “Pattern Generator”

    Can you please try this again, but open "Patgen Registers" before opening the Pattern Generator tab?

    I believe the registers have to instantiate first before you are able to configure the Patgen GUI.

    Please let me know what results you find.

    Best,

    Miguel

  • Hi Miguel,

    thanks a lot.

    This solved my problem with the "Pattern Generator" tab :-)

    Now I can look into my problem with my black display.

  • I tried the pattern generator with the available configuration for “HD 1080p 60Hz” and nothing happened on the display.

    I checked if something is different when the HDMI cable is not plugged in.
    I noticed in the HDMI tab that the FDP3 status in “Link Mode” only shows “Single Port0” instead of “Dual FPD3”.

    But if I read the registers of the deserializer correctly, it needs “Dual FDP3”:



    Is this normal? Or is the connection to the deserializer not established correctly?
    I have also tried to change the “Link Mode” via “Forced Dual”. Unfortunately this did not work. The "Link Mode" did not change.


    Incidentally, I noticed that the names for “FDP Audio Mode” and “FDP-Link III Mode” in the area "Bridge Control Settings" were probably mixed up:

    Another question: Do I have to set the EDID on the serializer in order to communicate between serializer and deserializer via “pattern generator”?

  • Hi Iris,

    The next two things I would check during your PATGEN from the SER is the following:

    1) Is there LOCK between the SER and DES devices?

    You can check this in ALP, I recommend:

    1. On the 948 device, reading general status 0x1C should return DUAL_RX_STS high, and LOCK should also be high after sending PATGEN.
      1. The Info tab should also show 948 as a partner device at this time.
      2. If Transmitter Dual Link Status is high, I believe this indicates that daisy chain may be enabled, should be disabled if this is the only DES.
    2. On the 949 device, you may read 0x0c for the link status to the device just to confirm it is locked with the DES.
    3. Check that the dual mode hardware is correctly configured for FPD-Link between SER and DES, and that DES daisy chain is disabled.

    2) Are the display specifications matched to the PATGEN programming?

    Double check that the resolution, blanking periods, and PCLK are all within the limitations of the output. Some displays may require strict blanking parameters.

    You may also want to use internal mode with internal clock in the case that the external clock/timing is not available as an input.

    EDID should not have to be set, as the PATGEN generator uses internal BIST to send from the SER.

    Please keep me updated on results!

    Best,

    Miguel

  • Hi Miquel,

    1) Is there LOCK between the SER and DES devices?

    Yes, when sending the PATGEN, DUAL_RX_STS and LOCK are high and both sides recognize the dual link status correctly.
    But the display still remains black.

    2) Are the display specifications matched to the PATGEN programming?

    Yes, I extracted the display specification directly from the EDID. The default settings for “HD 1080p 60Hz” also worked with my display.

    Only after I had set the EDID, connected the HDMI and restarted the pattern generator was I able to see the test pattern with the colors on the display.

    After I finished the pattern generator, I could also see my laptop screen on the display.

    It seems you have to switch on and configure the devices in a certain order to get a picture on the display:

    1. Switch on Deserializer + Serializer
    2. Write EDID information to the serializer
    3. Plug in HDMI source
    4. in the ALP software:
      1. Open pattern register
      2. Open pattern generator and configure correctly
      3. Then start the generator (test image is visible) and stop it again

    or:

    1. Switch on serializer
    2. Write EDID information to the serializer
    3. Plug in HDMI source
    4. Switch on Deserializer.

    I'm glad that I can now see more than just the black screen on my display.

    But without an HDMI source, I still can't see a test picture or at least turn on the backlight.
    Is this normal? Or am I still missing something?

  • Hi Iris,

    It is possible that the Pattern Generator timings are set to external clock source?

    In the external clock mode, the Pattern Generator will configure to internal timing parameters (resolution), while taking in and using an external clock signal. The internal timing mode will produce the clock as configured in the control registers. 

    See if you can use these settings for the Pattern Generator, to determine if you still need the HDMI source in order to produce an output at the DES - Display.

    Best,

    Miguel

  • Hi Miguel,

    I have already tried to change the source of the clock signal, but it didn't change anything.

  • Hi Iris,

    I see, it seems like the internal PCLK generator might be outside of the specifications for the Display's needs.

    If you have tried the above configuration and internal with the internal timing spec of 1080p at 60Hz does not work, then I would say the display might need the specific timing that the HDMI provides.

    Can you double check with the display specifications?

    With Internal timing, using an M factor of 3 and an N factor of 4 should produce a PCLK of 150 MHz, which would be used to drive the approximate timing which requires 148.5 MHz PLCK with the pre-programmed 1080p timing.

    Please let me know your thought on this.

    Best,

    Miguel

  • Hi Miguel,

    According to the information tab, the PCLK is ca. 150MHz when the HDMI video source is connected. So I tried out the value.
    But unfortunately nothing changed.

    So I also tried other PCLK frequencies, but nothing worked as long as the display was black.

    As soon as I connected the HDMI source and the background on the display came on. I was also able to use the pattern generator with the “Timing Source: Internal”.
    Even without the HDMI source being connected.

    So I guess I have a problem turning on the display without HDMI source.

    Is there any known solution for this problem?

    Best,
    Iris

  • Hi Iris,

    I will look into why the pattern does not display unless a source is involved. Please give me 1-2 business days to investigate.

    Best,

    Miguel

  • Hi Iris,

    Are you able to share the timing specifications that the display is using? I have a suspicion that the PCLK requirement for this timing may be strict, which is why using the HDMI source might be suitable for the application but when manually generating it during pattern generation it may be having trouble interfacing.

    Best,

    Miguel

  • Hi Miguel,

    Sorry it took so long to get back to you. I had to ask permission to share the timing specs.

    I can only share the EDIDs that were provided to me by the display manufacturer and the EDIDs that I personally generated via AW EDID Editor.

    Unfortunately, the EDID from the manufacturer includes another display. This is why it did not work with the single 1920x1080 display.

    0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x31, 0xD8, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
     0x17, 0x10, 0x01, 0x04, 0xA5, 0x1C, 0x0C, 0x78, 0xE6, 0xCB, 0x05, 0xA4, 0x55, 0x4C, 0x9A, 0x27,
     0x10, 0x50, 0x54, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
     0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x72, 0x41, 0x60, 0x96, 0x90, 0x38, 0x0F, 0x40, 0x32, 0x32,
     0x55, 0x00, 0xDC, 0x78, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0xFD, 0x00, 0x3B, 0x3D, 0x40,
     0x42, 0x30, 0x01, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x42,
     0x4A, 0x45, 0x56, 0x20, 0x64, 0x69, 0x73, 0x70, 0x6C, 0x61, 0x79, 0x0A, 0x00, 0x00, 0x00, 0xF7,
     0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE5


    I then created my own EDID for the 1920x1080 display from the EDID provided. This works when a Windows laptop is used as the HDMI source.

    0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x34, 0x27, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
     0x28, 0x22, 0x01, 0x04, 0xA2, 0x16, 0x0C, 0x78, 0xE7, 0xEE, 0x95, 0xA3, 0x54, 0x4C, 0x99, 0x26,
     0x0F, 0x50, 0x54, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
     0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x29, 0x36, 0x80, 0xA0, 0x70, 0x38, 0x1F, 0x40, 0x30, 0x20,
     0x35, 0x00, 0xDF, 0x7D, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0xFD, 0x00, 0x17, 0xF0, 0x0F,
     0xFF, 0x0E, 0x00, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x54,
     0x44, 0x53, 0x5F, 0x31, 0x39, 0x32, 0x30, 0x78, 0x31, 0x30, 0x38, 0x30, 0x00, 0x00, 0x00, 0x10,
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23

    I hope this information will help.

    Best,
    Iris

  • Hi Iris,

    Let me review this EDID timing to determine if the PCLK is achievable via an internal CLK PATGEN from the 949.

    Best,

    Miguel