DP83869HM: 使用xilinx Zynq UltraScale+ MPSoC核心板K26 PS作为主控，DP83869HM采用rgmii to cooper模式，连接失败

DP83867IR：Xilinx K26 SOM 的 Tx/Rx 问题 - 接口论坛 - 接口 - TI E2E 支持论坛

我的问题与这个帖子中提到的类似，哪位可以提供一下这个解决方法。

这个帖子是锁定状态，没有详细的解决方法。

Hello,

Would it be possible to report your question in English please?

Regards,

Alvaro

Thank you for your reply.

I used xilinx K26 SOM as the controller in my project, DP83869 worked in RGMII to cooper mode and the application was an example named lwip_echo_server supplied by xilinx. When  I connect my PCB to the PC by cable, the autonegoation was successful, but the PC can not communication with my board. The problem is similar to the description in the thread:DP83867IR: Tx/Rx Issues with Xilinx K26 SOM - Interface forum - Interface - TI E2E support forums. But the thread is locked, and I can not get its method to solve the problem. 

Bit2 in the BMSR Register shows link up, but when I link the board by telnet, about 1 minutes later it will show connecting fail.

Hello,

Thank you for clarifying the issue. To confirm, when the PCB is connected to the PC via an ethernet cable, link up (auto-negotiation) is successful.

Would you be able to confirm the block diagram of your set up please? Is it like the following:

K26 SOM <-RGMII-> DP83869 <-Magnetics->  RJ-45 Connector <-Ethernet Cable-> PC

Successful Auto-Negotiation tells me that the MDI portion of the DP83869 (from the PHY to the RJ-45) is good. The problem is likely with the RGMII interface. The most common RGMII issue is due to timing, mainly enabling the TX/RX Clock delay.

• How are the RGMII delays being set?
  • via the hardware bootstrap pins
  • via software

Please refer to the following FAQs for more information on how to configure the RGMII delay settings. 

faq-dp83867e-how-dp8386x-rgmii-straps-work

faq-dp83867e-what-is-the-default-mode-of-rgmii-when-using-dp83867-shift-or-align

faq-rgmii-timing---align-and-shift-mode

Regards,

Alvaro