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Original question:

DP83867CR: dp83867 PTP

DP83867E: Configuring Start of Frame Detection

Stefan
Prodigy 10 points

Part Number: DP83867E

Tool/software:

I am interested in implementing PTP in my application and I've read over the document, "How to Configure DP83867 SFDs" (How to Configure DP83867 Start of Frame Detect), but it was not clear when or where the necessary MDIO commands should be sent to the PHY.  Would this be handled by the PHY device driver at boot?  I was looking for DP83867 Linux device driver bindings that might configure the GPIO pins as required, but did not find any.

Furthermore, I wanted to know how these SFD signals are typically handled by the host system.  Is it simply a matter of connecting the PHY GPIOs to some GPIO pins on my microprocessor? For reference, I am targeting an NXP i.MX8M Nano.

Thanks,

Stefan

  • 0
    TI__Expert 7985 points

    Hi Stefan, 

    Stefan said:
    Would this be handled by the PHY device driver at boot?

    The PHY driver does not enable the SFD functionality by default. It must be written through register access. 

    Stefan said:
    but it was not clear when or where the necessary MDIO commands should be sent to the PHY

    These registers can be written to after power-up. End user can customize which GPIO pin they would like to use for SFD through writing the specific registers. I believe section 4 of the document you refer to goes over the necessary steps for configuring SFD.

    A common use case for SFDs is to measure the latency between the MAC and PHY for precise timing measurements since it provides a reliable reference point for timestamping packets. This can be done through GPIOs for both PHY and MAC

    Best,

    Vivaan