DS250DF410: lowest clock freq that can be used as inputs to generate 25.78125 G PRBS patterns.

Ramamurthy Gurushankar

Part Number: DS250DF410

Tool/software:

I see on the forum that an input clock signal at sub-rate of 25.78125G can be provided to generate a PRBS data @25.78125 G on the DS250DF410 retimer. What is the lowest clock frequency that is supported and where is it documented? Thank you very much for your help.

1 month ago

+1 Drew Miller1 1 month ago

TI__Mastermind 27047 points

Hi Ramamurthy,

I would recommend a sub-rate clock of 25.78125 GHz / 32 or higher.

Please see the thread below for more details.

https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1289801/ds250df230evm-a-problem-of-prbs-testing-with-ds250df230evm

Thanks,

Drew

+1 Ramamurthy Gurushankar 1 month ago in reply to Drew Miller1

Prodigy 40 points

HI Drew, Thanks for your response. I am still in the initial design stage for my board and wanted to make sure that I knew the constraints.

Another question: I am assuming that I can utilize all the 4 channels on the DS250DF410 to put out PRBS patterns (@25.78125G)simultaneously. Is my assumption correct?

Thank you very much.

-Gurushankar

+1 Ramamurthy Gurushankar 1 month ago in reply to Ramamurthy Gurushankar

Prodigy 40 points

I intend to use the retimer solely for PRBS generation and checking @25.78125 G date rates.

I want to get your input on if the following concepts work.

Thank you.

-Gurushankar

+1 Drew Miller1 1 month ago in reply to Ramamurthy Gurushankar

TI__Mastermind 27047 points

Hi Gurushankar,

I believe both of these concepts would work, but I believe option 1 will provide you more flexibility.

One thing I wanted to highlight is that we typically don't recommend enabling more than two PRBS blocks per device. While it's possible to enable more than two, I believe you will need to add heat sinking to help ensure devices do not overheat.

Thanks,

Drew

0 Ramamurthy Gurushankar 1 month ago in reply to Drew Miller1

Prodigy 40 points

Drew,

Thank you very much for your inputs. The test would very likely need to enable all the 4 lanes simultaneously. As you have suggested, I will plan for heatsinks.