TUSB1104: TUSB1104

Hi Nilay,

My concern right now is why the the 10Gbps port is enumerating as a USB2.0 speed. This implies that the Host is not able to reach max speed due to signal quality. 

What EQ values are currently used?

Can you share a schematic/ layout?

Dear Vishesh,

Thank you very much for your valuable response.

EQ values currently used are as per below:

USB Connector Facing Port Receiver (CRX1 and CRX2 pins) Equalization:

• EQ Gain at 5 GHz minus Gain at 100 MHz
  (dB) is 11.6.

USB Host Facing Port Receiver (SSTX1 and SSTX2 pins) Equalization:

• EQ Gain at 5 GHz minus Gain at 100 MHz
  (dB) is 6.

AEQCFG is set to 8h mean floating in pin strap mode.

Please share your personal ti detail so we can send schematic and Layout.

Hi Nilay,

I have requested friendship over E2E, please send the relevant files over a private message between you and I

Hi Vishesh,

Thanks for update. I have shared schematic and gerber file on private message.

Hi Nilay,

In the schematic I see that the data path is from the FMC connector to the TUSB1104 and then to the USBC cable. 

1) values of C70, C72,C69,C71 should be 330nF not 220nF 

2) (optional) replace R46,R47,R44,R45 with 330nF capacitor

Hi Vishesh,

Thanks for update. We have place 220nF capacitor as mentioned in datasheet. Please find attached image for more reference. Please share concern of 220nF capacitors if any. So we can change and check the results.

Please share application guide or procedure for using of Full AEQ mode or please guide us how to use this mode and how it works.

Dear Vishesh,

In Full AEQ with Linear Redriver Mode(In I2C mode),Can we get auto tune value of EQ if we run attached program? We got different value at every power reset. 

Dear Vishesh,

Is there any update? Your valuable response important for us.

Hi Vishesh,

Waiting for your valuable feedback. We have sent layout file in message(on E2E) as requested on date of 28th Feb 25.

Hi Nilay,

Apologies for the delay, I was out on travel. I just got back today. 

The layout high speed overall looks ok. What is the total pre-channel trace length, I see that the path from CON3 to the TUSB1104  is approx. 1600mil. What is the trace length from the connector to the SoC?

This is how AEQ works:

Please give your feedback regarding previously asked question.

• values of C70, C72,C69,C71 should be 330nF not 220nF >>> I have sent our concern regarding this in same thread.

• In Full AEQ with Linear Redriver Mode(In I2C mode),Can we get auto tune value of EQ if we run attached program? We got different value at every power reset. What was reason behind that?

Nilay Patel1 said:

values of C70, C72,C69,C71 should be 330nF not 220nF >>> I have sent our concern regarding this in same thread.

The reason I recommend this is because I do not know if there is any additional AC coupling on the USB host side. Capacitors in series will reduce the total capacitance of the bus. For example is the SSTX has an existing 100nF which is standard in a TX implementation. An additional 220nF will reduce the capacitance to outside of the USB spec. A 100nF with the 330nF will not. This is mostly as a precaution as I do not know what the signal path looks like past the connector.

Nilay Patel1 said:

In Full AEQ with Linear Redriver Mode(In I2C mode),Can we get auto tune value of EQ if we run attached program? We got different value at every power reset. What was reason behind that?

You cannot chnage the value of AEQ determined. You will need to go into fixed EQ mode to set this. AEQ only applies to the CRX1 and CRX2 lines. What is the USB-C cable being plugged into? 

You can limit the highest allowed EQ that AEQ can select using the following pin:

Ok But we got different value at every power reset for same host, Type C cable and FMC card. What was reason behind that?

Dear Vishesh,

We have checked above waveform in LFPS mode.Peak to peak voltage on Point A(On Rx-Between Type C connector and Re driver)  is 660mV and Peak to peak voltage on Point B(On Rx-Between Re driver and FMC connector)  is 1.2V.Our setting for USB Connector Facing Port Receiver (CRX1 and CRX2 pins) is 0 for CEQ0 PIN Level and 0 CEQ1 PIN Level(mean -0.4dB EQ Gain).For -0.4dB gain how much Peak to peak voltage will come? As per our understanding  waveform says that the setting is around 3.5dB.So please share your suggestion for this.

What different EQ values did you get here when you reset the board?

1.2V signaling coming into the TUSB1104 may oversaturate the RX pins. This may push the signal outside of the linearity range of the redriver resulting in a distorted signal at the output. Are you able to reduce the amplitude of the input signal?

Hi Nilay,

Any update?

Hi Vishesh, Thanks for update. Actually 1.2V signal is output of TUSB1104 not input of it. It is actually measurement between Redriver and FMC card. 660mV is input of Redriver(Between Type C connector and Re driver).

So the redriver is working as intended? What compliance issues is the board running into?

No, As per data(Waveform)redriver is not working intended. As my previous query, We have checked above waveform in LFPS mode. Peak to peak voltage on Point A(On Rx-Between Type C connector and Re driver)  is 660mV and Peak to peak voltage on Point B(On Rx-Between Re driver and FMC connector)  is 1.2V.Our setting for USB Connector Facing Port Receiver (CRX1 and CRX2 pins) is 0 for CEQ0 PIN Level and 0 CEQ1 PIN Level(mean -0.4dB EQ Gain).For -0.4dB gain, output voltage may be 631.0 but it is actually comes 1.2V. So please confirm that our understating is right or wrong?

Hi Nilay,

I believe you are using AEQ, this means that sampled pin levels of CRX1 and CRX2 will be ignored. Is my understanding incorrect?

Vishesh Pithadiya said:

What compliance issues is the board running into?

No, Above mentioned result are get in pin strap mode. Means that sampled pin levels of CRX1 and CRX2 was not ignored.

Recently as mentioned previously we are facing functional issue as per below:

In pin strap mode we got below result:

Asmedia Type C port + Amphenol cable

Lane1-> Not enumerate. Recovery during enumeration.

Lane2-> Not enumerate. Recovery during enumeration.

To resolve above issue, we have planned to check peak to peak voltage in LFPS mode. In waveform, we observed that peak to peak output voltage is not as per EQ setting(As mentioned earlier-Input voltage=660mv,Actual o/p Voltage=1.2V,Desired o/p voltage=631.0V For -0.4dB gain).    

HI Nilay,

Can you confirm that the DIR/FLIP pin operates as intended when changing the orientation of the connector?

How did you measure the 600mVpp vs. the 1.2Vpp. When the device is in pin-strap mode this is a linear redriver meaning that the voltage should be close to 1:1. 

Can you make sure that the SSTX and SSRX pins from the FMC connector are connected as follows?

SSTX1 on TUSB1104 -> SSTX1 on SoC

SSTX2 on TUSB1104 -> SSTX2 on SoC

SSRX1 on TUSB1104- > SSTX1 on SoC

SSRX2 on TUSB1104 -> SSRX2 on SoC

-Can you confirm that the DIR/FLIP pin operates as intended when changing the orientation of the connector?

Yes,It will operates as intended when changing the orientation of the connector.

-Can you make sure that the SSTX and SSRX pins from the FMC connector are connected as follows?

SSTX1 on TUSB1104 -> SSTX1 on SoC

SSTX2 on TUSB1104 -> SSTX2 on SoC

SSRX1 on TUSB1104- > SSTX1 on SoC

SSRX2 on TUSB1104 -> SSRX2 on SoC

Yes, SSTX and SSRX pins from the FMC connector are connected as above.

-How did you measure the 600mVpp vs. the 1.2Vpp. When the device is in pin-strap mode this is a linear redriver meaning that the voltage should be close to 1:1. 

Yes, Our concern is same as you. In pin strap mode, voltage close to 1:1 for linear redriver mode with around 0 dB gain. In our case, the observed output voltage is approximately 1.2V peak-to-peak (VPP), whereas the corresponding input voltage is around 600mV peak-to-peak (VPP).

So What was possible reason behind that?

Nilay Patel1 said:

Yes, SSTX and SSRX pins from the FMC connector are connected as above.

I mean from the FMC to the SoC not from the FMC to the redriver. 

The reason I ask this is because we dont see enumeration at USB3 speeds at all. But we did see enumeration at USB2.0 speeds. From the daughtercard layout, I see that the daughtercard is implemented ok, but I have no visibility into the system that this card is plugging into. There may be an issue of the TX connected to the TX pins of the SoC. This means the proper terminations will not be seen by the SoC resulting in an inability to detect a connection.

Nilay Patel1 said:

Yes, Our concern is same as you. In pin strap mode, voltage close to 1:1 for linear redriver mode with around 0 dB gain. In our case, the observed output voltage is approximately 1.2V peak-to-peak (VPP), whereas the corresponding input voltage is around 600mV peak-to-peak (VPP).

So What was possible reason behind that?

I'm not sure to be honest. There should be no setting that simply doubles the swing we are seeing. What is the method you are using to measure the signal? It may also be worthwhile to swap out this part for another TUSB1104 device to see if the behaviors is consistent. 

Hi,

I'm closing thsi thread due to inactivity.