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DP83869HM: Keep copper port link status unchanged when optical port link goes down

Balaji TS2
Intellectual 260 points
Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869EVM, DP83869

Tool/software:

Hello,

I am using DP83869HM PHY in Media Converter Mode(Optical to Copper). The device working fine when both side ports are connected. But we are facing issue when any one side of link goes down automatically other side link is also going down.

For example at start both copper port link and optical port link will be UP. At anytime when we disconnect only optical port(Copper port connected as it is), Copper port link is also going down. How to avoid this? I want make link of each port independent. Please provide a solution.

Regards,

Balaji TS

  • 0
    TI__Mastermind 40255 points

    Hi Balaji,

    This behavior is reminiscent of linkloss pass through functionality. This may have been enabled via strapping. Please look to adjust strapping (RX_CLK) and re-evaluate.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Thank You for the response Gerome,

    As per the datasheet we have connected the RX_CLK to VCC to disable linkloss pass through as you can see in the below screeshot.

    Is our strapping correct? If the strapping is correct means then how to resolve our issue? Is any PHY register setting causing this issue?

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hello,

    This looks correct. Pass through should be disabled. Please corroborate with Reg 0x6E (strap status). Note this is an extended register and needs extended register access.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    I have checked the strap status in 0x6E register. As per the 0x6E register data, the link loss pass through is disabled. Only this Pin is realted to my issue or any other hardware/software settings we should do to resolve the issue?

    And as i can see in datasheet, Link loss pass through is related to 100M only. So is it not related to 1000M? And is it related to optical port or copper port or both?

    And is it posible to make copper port fully independent of Optical port? Like when the board is Powered UP and if we connect copper port to any other link partner, the copper port link should come even if optical port is not connected. So is it possible to achieve this?

    I am doing these register operations after power up:

    Write 0x8000 to 0x0000

    Write  0x8000 to 0x001F

    Write 0x4000 to 0x001F

    Write 0x8000 to 0x0000

    Write 0x0110 to 0x0000

    Write 0x6CC0 to 0x0018

    For 100M Conversion:

    Write 0x1140 to 0x0000

    Write 0x5048 to 0x0010

    Write 0x1140 to 0x0C00

    Write 0x1FFC to 0x01EC

    For 1000M Coneversion:

    Write 0x1140 to 0x0000

    Write 0x5048 to 0x0010

    Write 0x0140 to 0x0C00

    Write 0x1FFC to 0x01EC

    Is my register settings correct? Or any changes required.

    Thank You.

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hello,

    I was able to take our DP83869EVM and create a setup for link loss pass through. For this setup, I have another EVM as the FX link partner, and a packet generator/checker as the CU link partner. I am strapping DUT and FX link partner in 1G MC mode. I observe LED1 for FX linkup while LED0 and 2 are observed to link and 1G speed, respectively.

    By default on the EVM, the Link Loss jumper is not strapped. When disconnecting the RX FX cable on the SFP, I see that the CU link is severed (expected).

    I then reset the PHY, but this time I strap the Link Loss jumper. I disconnect the RX FX cable on the SFP, and the CU link is intact (expected). 

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Thank you for verifying and confirming that CU port can retain its link status irrespective of Optical port status. 

    Any other hardware pin strapping or Register configuration is required for disabling link loss pass through feature other than RX_CLK strap?

    And please confirm us whether our register setting creating any issue?

    Regards,

    Balaji TS

  • +1 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hi Balaji,

    You are writing a lot of register resets which are not necessary. Would recommend single write of Reg 0x1F[15] = '1' is sufficient. Is PHY strapped into 1G MC mode? This would take care of a lot of the register configuration. 

    Else, it appears that Link Loss Pass Through is Reg 0x1EC[3]. I see this bit toggling upon readback dependent on the strap. This appears to be '0' to disable Link Loss Passthrough, while '1' to enable.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Where can I find the details of x1EC register?  In datasheet 0x1EC register details is not given.

    And I have one more doubt. Does this board support one way traffic? Like CU port is connected to one PC1 and Optiacal port is connected to PC2(We will connect only one wire i.e. Optical port TX to PC2 RX). After that we want to send data from PC1 to PC2. Is this achievable?

    Thank You.

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hello,

    We will take a look at un-reserving this bit in the next datasheet revision. For you application, this bit is the correlative, mutable field for the Link Loss Pass Through functionality. You may read and write to this bit and observe the difference in behavior.

    This board cannot support one-way traffic on the FX side, as the first DP83869 would need to establish link for communication to pass through. With only the TX side plugged in via FX cable, there is no way to accomplish this. Thus, RX also needs to be plugged in. You can still establish uni-direction in application with this configuration.

    Sincerely,
    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Gerome Cacho said:
    You can still establish uni-direction in application with this configuration.

    From this statement I got confused actually. Is it posible achieve one way communication with single optical wire connected between Device1 TX to Device2 RX or not possible?

    Gerome Cacho said:
    This board cannot support one-way traffic on the FX side, as the first DP83869 would need to establish link for communication to pass through.

    Is there any way that we can force link up the optical port manually? And how does DP83869 gets to know the cable is connected/disconnected so that it can update the status to Link_UP/Link_Down.

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hello,

    With single optical wire, the device will not link up. You will need to use both wires and in SW ensure communication is only sent one way.

    In fiber, a common way to understand if connection has been lost is either via signal detect, or far-end-fault. Both require both fiber wires connected.

    Sincerely,
    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Thank you for the Clarification. 

    Is there any way we can disable the far end fault detection or signal detection to spoof the link as always UP?

    I have tried this by connecting Signal Detect(JTAG_TDI) pin to ground. But When I remove RX wire, link is going DOWN. What is the function Signal detect pin in DP83869HM?

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hello,

    Most likely the link down is due to far end fault detection. This occurs when a DUT's RX cable has been unplugged while TX is still active, in which the DUT sends out a fault error to the link partner to also drop link. 

    There is no known way to spoof linkup in fiber for this device.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Our project requirement is to send traffic from one Device to other Device using single fiber optical wire. So can you suggest us any other PHY which can fulfill our requirement?

    In PHY_CONTROL(0x10) register there is bit named as FORCE_LINK_GOOD. What is the purpose of that bit?

    One thing to update is, after disabling the fiber autonegotiation, if Device_2 TX is not connected(Only RX is connected) Link is staying UP at Device 2. But Device_1 link became DOWN because the TX of Device_2 is disconnected. 

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hi Balaji,

    We only have 2x Fiber devices in our modern portfolio; DP83869 and DP83822 (only 100Base-FX). 

    For Reg 0x10, as this is not in the 0xCxx block, this block may not be applicable. Typically, I have seen this bit be used for CU link spoofing.

    Sincerely,
    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Thank you for the suggession.

    Does this board support CU link spoofing?How to enable or implement that?

    And whats the purpose of Bit 12 (CTRL0_ANEG_EN) os 0x0C00 register? Does this bit controls the Fiber port autonegotiation in Media conversion mode?

    Regards,

    Balaji TS

  • +1 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hello Balaji,

    I found a way to spoof a FX link for DP83869. Could you please program the DUT which must be transmitting only with Reg 0xD4[15] and provide feedback if this will work in your application?

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Thank you for the suggestion. Register 0xD4[15] works good for Fiber link spoofing. Link stays UP even without connecting a RX cable. But the issue is I am not able send data from Device 1(TX) to Device 2(RX) if Link spoofing is enabled means.

    Note : Both device showing Link UP at both CU port and Fiber port during this test. 

    And I have observed one more thing i.e. 0xD4[15] is automatically getting cleared. Before modified the register I read the register. I got 0x1200 as response. And to enable fiber link spoofing I wrote 0x9200 to that register, so fiber Link spoofing enabled and Fiber link stays UP even without connecting RX. Again if read the 0xD4 I am getting 0x1200 response. Is is Read Clear Bit or Read/Write Bit? 

    Can a get anymore more details of 0xD4 register?And one more thing is if the fiber link spoofing is enabled means, I am not able to send data even if both RX and TX lines are connected at Device 1 and Device 2.

    What might be causing the issue? Do I need to change any other register settings (Copper or Fiber) to send data while Link spoofing is enabled?

    And I have observed one more thing i.e. 0xD4[15] is automatically getting cleared. Before modified the register I read the register. I got 0x1200 as response. And to enable fiber link spoofing I wrote 0x9200 to that register, so fiber Link spoofing enabled and Fiber link stays UP even without connecting RX. Again if read the 0xD4 I am getting 0x1200 response. Is is Read Clear Bit or Read/Write Bit? 

    Can a get anymore more details of 0xD4 register?

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    Intellectual 260 points

    And one more observation is, we have programmed our DUT without enabling the Fiber link spoofing. And we connected both TX and RX lines between our devices. With this setup I can send data from Device 1 to Device 2 without any issue. During runtime I have enabled fiber link spoofing by writing 0xD4[15]. After this again I have tried sending data from Device 1 to Device 2. Now only first 9 or 10 frames getting sent from Device 1 to Device 2[Irrespective of RX connection at Device 1], after that data transfer is getting stopped. Again frames are reaching Device 2 only after disabling the Fiber link spoofing. 

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hi Balaji,

    This setting was given from prior E2E, and was corroborated in EVM.

    https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1002023/dp83869hm-media-converter-mode-for-1000x-link-up

    There has to be something different in the setup. I would recommend cross corroborating the findings made by Vikram and Jane on our EVM with another EVM set if you have available to you.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Thank You for the support. By setting 0xD4[15] = 1, I am able to implement Fiber Link Spoofing. After adding a Static ARP in my system, I am able to send data continously now.

    Regards,

    Balaji TS

  • 0 in reply to Balaji TS2
    TI__Mastermind 40255 points

    Hello Balaji,

    Thanks for the confirmation. It seems everything should be good now on your front. I will be closing this thread.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Intellectual 260 points

    Hello Gerome,

    Yes everything is working fine. Thank You.

    Regards,

    Balaji TS